Test Pad Configuration for Display Device Wire Routing
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Solution Overview
Problem
As display devices evolve with increased resolution, the area required for output bumps and wires becomes insufficient, leading to reliability and yield issues due to limited substrate space and potential corrosion of test pads during testing.
Innovation Solution
A display device configuration that includes a patterned test pad with separated functional regions connected through a connecting layer, reducing wire area occupation and preventing corrosion by isolating signal transmission and probe contact areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the resolution of the display panel is enhanced, then the display quality is improved, but the area required for output bumps and wires becomes insufficient
Solution Approach 1:
The patent extends wire routing from the chip area into the non-display region, utilizing the unused space dimension to accommodate additional wires. This dimensional extension allows more wires to be routed without compromising the display resolution or requiring additional chip area.
Solution Approach 2:
The patent divides the wire routing path into two segments: wires that remain within the chip area and wires that extend into the non-display region. This segmentation allows the system to distribute wire routing across different spatial zones, effectively increasing the total wire accommodation capacity while maintaining high display resolution.
2Quantity of substance
If the amount of output bump increases, then the signal transmission capability is improved, but the area used to accommodate the wires electrically connecting to the bump becomes insufficient
Solution Approach 1:
The patent utilizes the non-display region as an additional spatial dimension for wire routing. By extending wire paths into this unused area, the system can accommodate a greater number of output bumps and their corresponding wires without increasing the chip area or compromising the display region.
Solution Approach 2:
The patent segments the wire connection system into two parts: connections within the chip area and connections extending into the non-display region. This segmentation allows the system to handle increased output bump quantities by distributing the wire routing load across both regions, effectively solving the area constraint problem.
3Device complexity
If the area of the portion of the substrate below the chip is reduced, then the chip integration is improved, but the portion of the substrate below the chip in which the wires pass through becomes insufficient
Solution Approach 1:
The patent compensates for the reduced substrate area below the chip by utilizing the non-display region as an alternative spatial dimension for wire passage. This dimensional shift allows wires to route through the non-display region instead of requiring extensive substrate area directly below the chip, thereby maintaining adequate wire passage capacity while improving chip integration.
Solution Approach 2:
The patent segments the wire passage function between two locations: the substrate below the chip and the non-display region. This segmentation allows the system to reduce the substrate area below the chip for better integration while still providing sufficient wire passage capacity through the non-display region.
4Ease of manufacture
If the test pad is used during testing, then the manufacturing process is completed, but corrosion of the test pad occurs leading to reliability issues
Solution Approach 1:
The patent extracts the test pad function from the main signal transmission path by using a separate, dedicated test pad structure. This extracted test pad can be independently accessed during testing without interfering with the normal signal transmission wires, thereby preventing corrosion of the main signal paths while maintaining manufacturing testability.
Solution Approach 2:
The patent introduces a separate test pad as an intermediary element that facilitates manufacturing testing without directly involving the main signal transmission wires. This intermediary test pad absorbs the corrosion risk during testing, protecting the reliability of the actual signal transmission paths while still enabling the manufacturing process to be completed.
Data Source
AI summary
The present disclosure provides a display device, including: a display region; and a non-display region adjacent to the display region, wherein the non-display region includes: a gate-driving circuit; a driving unit; and a test pad, wherein the driving unit electrically connects the gate-driving circuit through the test pad. The present disclosure also provides a test pad.