Test Panel Resistive Layer for Static Protection

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Solution Overview

Problem

Existing display devices face challenges in protecting test elements from static electricity, which can damage them and disrupt normal test operations.

Innovation Solution

A test panel is designed with a resistive layer in the same layer as the semiconductor layer, connecting the test elements to test pads through connecting lines, thereby preventing static electricity from reaching the test elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If test elements are exposed to external static electricity, then test operations can be performed, but the test elements may be damaged

Engineering Contradiction:
Improvetest element reliabilityVSAvoidstatic electricity damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A resistive layer is introduced as an intermediary component between the test element and the external environment. This resistive layer has controlled resistance properties that allow it to dissipate static electricity charges gradually, preventing sudden charge discharge that would damage the test element. The resistive layer acts as a protective mediator that maintains test element reliability while allowing necessary electrical connections.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The resistance parameter of the protective layer is specifically controlled to be within a certain range (e.g., 10^5 to 10^9 ohms). By adjusting the resistance parameter, the layer can effectively dissipate static electricity charges at a controlled rate, preventing damage to test elements while maintaining proper electrical connection for test operations.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a protective layer is added to protect test elements from static electricity, then test element reliability improves, but device complexity increases

Engineering Contradiction:
Improvetest element protectionVSAvoidpanel structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protective resistive layer is merged with existing panel layers or integrated into the same manufacturing process as other panel components. By combining the protective function with existing structural elements, the design avoids adding separate complex protective structures, thereby maintaining simplicity while achieving reliable static electricity protection.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Instead of adding a completely new protective structure, the solution modifies the electrical parameters (resistance) of existing layers or materials. This parameter-based approach allows protection to be achieved through material property adjustment rather than structural complexity increase.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of resistive layers effectively reduces the impact of static electricity on test elements, preventing damage and ensuring reliable test operations.

Implementation Method 1

a first resistive layer that is in a same layer as the semiconductor layer and that connects the first electrode and the first connecting line spaced apart from each other

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS20250072215A1Test panel and display device
Publication Date: 2025.02.27 SAMSUNG DISPLAY CO LTD
  • US20250072215A1 patent drawing
  • US20250072215A1 patent drawing
  • US20250072215A1 patent drawing

AI summary

A test panel includes: a pixel; a first test element connected to the pixel, the first test element including a gate electrode, a semiconductor layer, a first electrode, and a second electrode connected to the pixel; a test pad spaced apart from the first test element; a first connecting line connected to the first test element and the test pad; and a first resistive layer in a same layer as the semiconductor layer and connecting the first electrode and the first connecting line spaced apart from each other.