Semiconductor Test Socket Sliding Pins Reduce Interference

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor testing processes face challenges in ensuring reliable electrical testing of semiconductor devices, particularly in reducing electric interference and increasing productivity during batch testing of solid-state drives (SSDs).

Innovation Solution

A test socket design featuring sliding pins of varying lengths within the socket housing, which includes a socket housing with an inlet for substrate insertion, terminals, and sliding pins of different lengths to minimize electric interference by optimizing the separation between pads on the substrate, thereby enhancing testing reliability and productivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sliding pins of uniform length are used in the socket, then the structure is simple and easy to manufacture, but electric interference occurs between adjacent terminals and productivity is reduced

Engineering Contradiction:
Improvetesting reliabilityVSAvoidsocket structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by making each sliding pin have a different length corresponding to its specific terminal position. The first sliding pin has a first length for a first terminal, while the second sliding pin has a second length for a second terminal. This localized differentiation optimizes electrical connection quality for each terminal while minimizing interference between adjacent terminals, thereby improving testing reliability without requiring complete redesign of the entire socket structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The socket structure is segmented into multiple independent sliding pins, each with optimized length for its specific terminal. This segmentation allows each pin to be independently designed and adjusted to minimize electric interference with adjacent terminals while maintaining appropriate electrical connections, resolving the contradiction between reliability and complexity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If sliding pins of varying lengths are used to reduce electric interference, then testing reliability improves, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidsocket manufacturing ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Each sliding pin is designed with a specific length tailored to its terminal position and electrical connection requirements. This local optimization ensures reliable electrical connections while minimizing interference with adjacent terminals. The differentiated pin lengths are implemented in a systematic manner that maintains manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If uniform terminal spacing is used in the socket, then the structure is simple and manufacturing is easier, but electric interference between terminals increases

Engineering Contradiction:
Improvesocket manufacturing easeVSAvoidelectric interference
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent implements local quality by varying the spacing between terminals based on their specific positions and electrical characteristics. Certain terminals have larger spacing to minimize electric interference, while others maintain standard spacing. This localized differentiation reduces harmful electromagnetic interference between adjacent terminals while maintaining overall structural simplicity and manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9360499B2Socket for testing a semiconductor device and test equipment including the same
Publication Date: 2016.06.07 SAMSUNG ELECTRONICS CO LTD
  • US9360499B2 patent drawing
  • US9360499B2 patent drawing
  • US9360499B2 patent drawing

AI summary

A test socket has a housing with an inlet configured to receive a substrate. A plurality of terminals are coupled to the housing, and a plurality of sliding pins are coupled to the terminals. The pins are configured to make contact with respective pads or terminals of the substrate to be tested. The pins have different lengths or positions to send and receive test signals.