Test System Stabilizing Voltages for Accurate Chip Probing
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Solution Overview
Problem
Conventional chip probing methods face accuracy issues due to wafer warpage caused by backside grinding and backside metallization, and variations in contact resistance between probe units and contact pads.
Innovation Solution
A test system comprising a to-be-tested die with a to-be-tested transistor and a sense transistor, and a test device with a probe card, a signal amplifying unit, and a testing unit. The testing unit generates and outputs test signals to determine current magnitudes and calculate a current ratio, while the signal amplifying unit stabilizes voltages to improve measurement accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If backside grinding and backside metallization (BGBM) process is performed to reduce power loss of the wafer, then power loss is reduced, but wafer warpage occurs causing connection resistance to increase
Solution Approach 1:
The patent introduces a sense transistor as an intermediary element to measure the connection resistance caused by wafer warpage. The sense transistor is positioned in the same electrical path as the to-be-tested transistor, allowing it to sense the connection resistance. By measuring the current ratio between the sense transistor and to-be-tested transistor, the system can compensate for the increased connection resistance, thus maintaining measurement precision even after BGBM process
Solution Approach 2:
The patent changes the measurement parameter from direct resistance measurement to current ratio measurement. By measuring the current through the sense transistor and the current through the to-be-tested transistor, and calculating their ratio, the system can eliminate the influence of connection resistance variations caused by wafer warpage, thereby maintaining measurement accuracy after BGBM process
2Reliability
If probe unit pressure is increased to improve contact stability, then contact stability improves, but contact resistance varies due to probe unit and contact pad characteristics
Solution Approach 1:
The sense transistor serves as an intermediary that measures the actual current flow conditions at the contact interface. By using the sense transistor to detect the current ratio, the system can account for variations in contact resistance without requiring excessive probe pressure, thus maintaining both contact stability and measurement precision
Solution Approach 2:
The patent implements a feedback mechanism where the measured current ratio from the sense transistor is used to compensate for contact resistance variations. The system continuously monitors the current ratio and uses this information to correct for contact resistance changes, allowing for stable measurements without excessive probe pressure
3Device complexity
If conventional chip probing method is used to measure on-resistance, then measurement process is simple, but measurement accuracy is low due to connection resistance and contact resistance variations
Solution Approach 1:
The patent introduces a sense transistor as an intermediary measurement element that is electrically connected in the same path as the to-be-tested transistor. This sense transistor allows the system to measure and compensate for connection resistance and contact resistance variations, significantly improving on-resistance measurement accuracy while adding only moderate complexity to the measurement process
Solution Approach 2:
The patent changes the measurement approach from direct on-resistance measurement to current ratio measurement. By measuring the ratio of currents through the sense transistor and to-be-tested transistor, the system can eliminate the influence of connection resistance and contact resistance, achieving high measurement accuracy with a relatively simple extended measurement process
Data Source
AI summary
A test system includes a to-be-tested die including a to-be-tested transistor and a sense transistor, and a test device including a signal amplifying unit, a testing unit, and a probe card connecting the signal amplifying unit and the testing unit to the die. The signal amplifying unit has a first terminal connected to the to-be-tested transistor, and second and third terminals connected to the sense transistor. The signal amplifying unit stabilizes voltages at the second and third terminals based on a voltage at the first terminal, and generates an amplification voltage based on the voltages at the first to third terminals. The testing unit provides test signals to the to-be-tested transistor, determines magnitudes of currents flowing through the to-be-tested transistor and the sense transistor based on the test signals, the amplification voltage and a predetermined resistance, and thus acquires a current ratio to determine whether the die is defective.