Tester Channel Units Parallel Data Processing
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Solution Overview
Problem
Conventional test systems face inefficiencies in capturing and processing parallel output data from devices under test, leading to distributed data that requires serial computation and increased test times, especially when multiple devices are tested simultaneously.
Innovation Solution
A tester architecture with channel units that allow data transfer and processing between units, enabling parallel evaluation of complex test algorithms and reducing the need for serial computations by distributing captured data across units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is captured using individual channels per test pin, then each channel can independently process its data, but the data becomes distributed across channels requiring serial computation and increasing test time
Solution Approach 1:
The patent combines distributed data from multiple channels into a centralized data structure accessible by all test processors. This merging allows parallel processing of complete test algorithms across multiple channels simultaneously, eliminating the need for serial computation and significantly reducing test time while maintaining independent channel operation
Solution Approach 2:
The patent segments the test processing architecture into independent channel units, each with its own test processor and memory, while implementing a shared data structure that allows all processors to access complete test data. This segmentation enables parallel execution of test algorithms on different data segments simultaneously
2Productivity
If multiple devices are tested simultaneously, then test throughput increases, but data distribution across channels requires serial processing per site increasing overall test time
Solution Approach 1:
The patent implements a universal data structure and processing framework that serves multiple devices tested simultaneously. Each device's test data is organized in the same format and processed using identical algorithms, allowing the system to handle any number of devices with the same architecture without increasing complexity proportionally
3Measurement precision
If complete data is necessary to compute test results, then accurate testing can be performed, but distributed data across channels cannot be accessed by single test processors requiring data upload to workstation
Solution Approach 1:
The patent introduces a shared data structure as an intermediary between individual channel memories and test processors. This intermediary allows test processors to access complete test data from all channels directly without uploading to external workstations, maintaining data integrity while eliminating transfer delays
Data Source
AI summary
A tester for testing a device under test has a first channel unit and a second channel unit. The first channel unit has a corresponding first pin connection for a signal from a device under test, a corresponding first test processor adapted to process, at least partially, data obtained from the first pin connection, and a corresponding first memory coupled with the first test processor and adapted to store data provided by the first test processor. The first channel unit is adapted to transfer at least a part of the data obtained from the first pin connection to the second channel unit as transfer data. The second channel unit has a corresponding second test processor adapted to process, at least partly, the transfer data from the first channel unit.