TestPicker System for Reducing Logic Circuit Test Redundancy

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Solution Overview

Problem

Current methods for testing complex digital electronic circuit designs are inefficient, as they often require manual design of test cases, which is time-consuming and costly, and random testing generates many redundant test cases that waste simulation run time and error analysis time.

Innovation Solution

The 'TestPicker' system uses a hierarchical bipartite graph data structure to analyze test history and generate a minimum set of dissimilar tests that cover a maximum number of failures, reducing the need for redundant testing and minimizing engineering time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If manual design of test cases is employed, then test efficiency is improved by focusing on significant test cases, but engineering time and cost increase

Engineering Contradiction:
Improvetest efficiencyVSAvoidengineering time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary analysis of test history and failure patterns before generating new test cases. By pre-processing historical data to identify dissimilar failure modes, the system prepares an optimized test suite that focuses on significant test cases without requiring manual intervention during the actual testing phase.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention introduces an intermediary algorithm that automatically analyzes test history and selects dissimilar test cases. This intermediary processing layer bridges between raw historical test data and the final test suite, eliminating the need for manual selection while maintaining high test efficiency through intelligent filtering of redundant cases.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If totally random tests are generated, then development cost is reduced through automatic preparation, but simulation run time increases due to redundant test cases

Engineering Contradiction:
Improveautomatic test preparationVSAvoidsimulation run time
Core Design Contradiction:
Ease of manufactureVSDuration of action of moving object

Solution Approach 1:

The system changes the parameters of test case selection by incorporating historical failure data as a filtering criterion. Instead of purely random selection, the system modifies the selection process to prioritize tests that have previously exposed different failure modes, thereby reducing redundancy while maintaining automatic generation.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention implements feedback mechanisms by continuously analyzing test history and using that information to guide future test case selection. The system learns from past failures and adjusts its test generation strategy accordingly, eliminating redundant tests that have already been executed without achieving new failure detections.

Inventive Principle:
Principle #23Feedback

3Reliability

If many test cases are run to identify logic errors, then detection coverage is improved, but resource usage and analysis time increase due to redundancy

Engineering Contradiction:
Improveerror detection coverageVSAvoidsimulation resource usage
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The system extracts and removes redundant test cases from the test suite by comparing them against historical failure data. By taking out only the essential dissimilar test cases that have the potential to expose new logic errors, the system maintains comprehensive detection coverage while significantly reducing the total number of tests that need to be executed.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7315973B1Method and apparatus for choosing tests for simulation and associated algorithms and hierarchical bipartite graph data structure
Publication Date: 2008.01.01 UNISYS CORP
  • US7315973B1 patent drawing
  • US7315973B1 patent drawing
  • US7315973B1 patent drawing

AI summary

An apparatus for and method of generating test cases for testing simulated logic circuit designs. The test cases are basically generated automatically in a random fashion, manually, or using some combination of automatic and manual techniques. Each test case has a corresponding success indication. These test cases are provided to the simulated logic design for execution. Following execution, each test case is rated pass or fail by comparison of the result with the corresponding success indication and a reason for failure is recorded for each failure. A significantly smaller list of test cases is prepared by eliminating test cases which do not have a unique reason for failure. The smaller list of test cases is then presented for a simulation run which requires substantially less simulator time and substantially less manual analysis of the results.