Tetherless System-in-Package Without Substrate for Miniaturized IoT

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Solution Overview

Problem

Existing planar electronic devices require a conventional power source and cannot be miniaturized for remote, untethered applications due to the need for a passive base substrate and battery power.

Innovation Solution

A tetherless system-in-package structure that includes interconnects for chip-to-chip bonding without a passive base substrate, utilizing energy harvesting elements like photovoltaic cells and supercapacitors to store and supply power to integrated circuit chips, enabling battery-free operation and reduced size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a conventional power source and passive base substrate are used, then the device can be powered and structurally supported, but the device size increases and it cannot be miniaturized for remote applications

Engineering Contradiction:
Improvedevice sizeVSAvoidpower source and substrate structure
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the passive base substrate from the traditional device structure, using only active IC chips bonded together through interconnects. This removal of unnecessary components directly reduces device volume while maintaining structural integrity through the chip-to-chip bonding architecture.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The active IC chip serves multiple functions simultaneously: it provides computational functionality, structural support, and energy storage capability through integrated supercapacitors. This multi-functionality eliminates the need for separate passive substrate and power source components, reducing overall device volume.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Volume of moving object

If a battery is used to power the device, then the device can operate untethered, but the device cannot be miniaturized due to battery size constraints

Engineering Contradiction:
Improvedevice sizeVSAvoidpower supply duration
Core Design Contradiction:
Volume of moving objectVSDuration of action of moving object

Solution Approach 1:

The patent transitions from traditional battery power storage to supercapacitor-based energy storage integrated within the IC chip. This parameter change in the energy storage mechanism enables significantly reduced size while providing sufficient operational duration for IoT and AI applications through high power density and efficient energy management.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The supercapacitor is nested within the active IC chip structure, with energy storage elements integrated into the chip substrate. This nesting approach allows the power storage function to be embedded within the computational component, eliminating the need for separate battery components and enabling miniaturization.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Adaptability or versatility

If a passive base substrate is used for chip bonding, then the chips can be structurally supported, but the device size increases and flexibility is reduced

Engineering Contradiction:
Improveembedding flexibilityVSAvoiddevice size
Core Design Contradiction:
Adaptability or versatilityVSVolume of moving object

Solution Approach 1:

The passive base substrate is completely extracted from the device architecture. Instead, active IC chips are directly bonded to each other through interconnects, creating a substrate-less structure that dramatically reduces device volume and enables embedding in various materials and configurations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The structural support function previously provided by the passive substrate is merged into the active IC chips themselves. The chips are bonded directly to each other, combining computational functionality with structural integrity in a single integrated architecture that enhances flexibility and reduces size.

Inventive Principle:
Principle #5Merging (Combining)

4Volume of moving object

If traditional chip bonding methods are used, then chips can be connected, but the device requires a passive base substrate that increases size

Engineering Contradiction:
Improvedevice sizeVSAvoidchip bonding process
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The patent transitions from planar chip bonding on a substrate to three-dimensional chip-to-chip bonding through vertical interconnects. This dimensional change eliminates the need for a large passive substrate while maintaining reliable electrical and mechanical connections between chips, reducing device footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Active interconnect structures serve as intermediaries between bonded chips, providing both electrical connection and mechanical support without requiring a passive base substrate. These interconnect elements mediate the bonding process, enabling direct chip-to-chip integration that reduces overall device volume.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the creation of miniaturized, battery-free, and environmentally friendly electronic devices that can be embedded in various materials, supporting applications like IoT and AI systems with reduced power consumption and increased flexibility.

Implementation Method 1

The energy harvesting elements include photovoltaic elements for harvesting energy

Methodology Applied
Scientific EffectPhotovoltaic effect: Photovoltaic Effect

Implementation Method 2

a rectifier is configured to convert the charge output from the energy harvesting elements prior to storage in the super-capacitor

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Implementation Method 3

A super-capacitor is coupled to the energy harvesting elements and is configured to store a charge output by the energy harvesting elements

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11239150B2Battery-free and substrate-free IoT and AI system package
Publication Date: 2022.02.01 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11239150B2 patent drawing
  • US11239150B2 patent drawing
  • US11239150B2 patent drawing

AI summary

A tetherless system-in-package includes a first integrated circuit (IC) chip having interconnects and energy harvesting elements. A super-capacitor is configured to store a charge output by the energy harvesting elements. At least a second IC chipset including a smart chip and an optical I/O or an RF I/O is aligned and bonded to at least one of the interconnects of the first IC chip. The first IC chip and the second IC chip are configured to receive a portion of the charge stored by the super-capacitor.