Texture Coordinate Derivative Prefetching for GPU Latency Reduction

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Solution Overview

Problem

Current graphics processing units face high latency in memory access operations, particularly when rendering three-dimensional objects with texture maps, as memory read operations are significantly slower than arithmetic operations, limiting rendering efficiency.

Innovation Solution

The method involves predicting future memory accesses by computing a first-order derivative of memory addresses with respect to pixel locations on the same facet of a 3D model, allowing for prefetching of texel memory locations into a local cache, thereby reducing latency when the corresponding pixels are rendered.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple rendering threads are started simultaneously to compensate for memory access latency, then rendering throughput is improved, but the number of registers and stack memory required for tracking threads increases

Engineering Contradiction:
Improverendering throughputVSAvoidregister and stack memory requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent computes texture coordinate derivatives and predicts future texture memory addresses in advance, before the actual texture reads are needed. This preliminary computation allows the GPU to prefetch texture data into cache memory ahead of time, so that when rendering threads need the texture data, it is already available, reducing the need to keep numerous threads in flight simultaneously

Inventive Principle:
Principle #10Preliminary action

2Reliability

If memory read operations are performed for texture maps, then texture rendering is achieved, but latency increases significantly compared to arithmetic operations

Engineering Contradiction:
Improvetexture rendering accuracyVSAvoidmemory access latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary computation of texture coordinate derivatives and predicts future texture memory addresses before the actual texture reads occur. This allows the memory system to start fetching texture data in advance, overlapping the prefetch operation with other rendering computations, thereby hiding the memory latency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces cache memory as an intermediary between the slow main memory and the fast arithmetic units. By predicting future texture addresses and prefetching data into this intermediate cache layer, the system reduces the effective access time for texture data without sacrificing rendering accuracy

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If texture coordinate derivatives are computed to predict future memory accesses, then memory access latency is reduced, but additional computation is required

Engineering Contradiction:
Improvememory access latencyVSAvoidderivative computation overhead
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent changes the parameters being computed from full texture coordinate transformations to simplified derivatives with respect to pixel coordinates. This parameter change focuses computation only on the essential variation of texture coordinates across adjacent pixels, significantly reducing computational overhead while still enabling accurate prediction of future texture memory addresses

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP2756485B1Accelerated texture lookups using texture coordinate derivatives
Publication Date: 2019.02.20 SONY INTERACTIVE ENTERTAINMENT LLC
  • EP2756485B1 patent drawingFigure 1
  • EP2756485B1 patent drawingFigure 2
  • EP2756485B1 patent drawingFigure 3

AI summary

Methods, systems, and devices are disclosed for preparing to prefetch memory in 3D graphical shader programs. Based on the memory addresses of texels from a texture map that were previously read, a memory address of a to-be-read texel is estimated by using a first-order derivative of the memory address with respect to pixel distance. The estimated memory address is then prefetched for use when the pixel corresponding to the texel is rendered. Whether or not to perform the estimation of the texel memory address can be determined by whether the corresponding pixels are on the same, flat facet on a 3D model. Multiple directions on the facet can be used for memory address estimation as well as higher-order derivatives.