Textured Boundary Switching Resistor for CMOS Integration

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Solution Overview

Problem

Current switching resistors face challenges in achieving efficient intrinsic bulk resistance switching in silicon oxide-based devices, particularly due to the requirement of vacuum conditions and limited understanding of intrinsic switching mechanisms, which hinders their integration into practical CMOS fabrication processes.

Innovation Solution

The development of a switching resistor with a textured boundary surface between the electrodes and a dielectric layer, promoting the formation of conductive pathways within the dielectric layer, enables intrinsic bulk resistance switching by enhancing columnar growth and oxygen mobility, thus allowing for low voltage and high endurance switching operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If intrinsic bulk resistance switching is implemented in silicon oxide-based devices, then switching voltage and power consumption are reduced, but the switching mechanism is not well understood and integration into CMOS fabrication processes is hindered

Engineering Contradiction:
Improveswitching voltageVSAvoidintegration into CMOS fabrication
Core Design Contradiction:
Use of energy by moving objectVSEase of manufacture

Solution Approach 1:

The patent applies parameter changes by modifying the physical and chemical parameters of the silicon oxide dielectric layer, including creating oxygen-deficient regions, controlling stoichiometry (SiOx where x < 2), and adjusting layer composition to enable intrinsic bulk resistance switching while maintaining compatibility with CMOS fabrication processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements local quality by creating spatially non-uniform oxygen distribution within the silicon oxide layer, with oxygen-deficient regions serving as conductive filaments surrounded by oxygen-rich regions, enabling localized conduction pathways that facilitate low-voltage switching

Inventive Principle:
Principle #3Local quality

2Reliability

If vacuum conditions are required for surface switching, then intrinsic switching can be achieved, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improveswitching mechanism stabilityVSAvoidvacuum requirement
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the vacuum requirement from the switching mechanism by transitioning from surface switching (which requires vacuum) to bulk switching that occurs in ambient conditions, removing the harmful constraint while preserving the intrinsic switching mechanism

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent inverts the switching location from the surface interface (requiring vacuum) to the bulk interior of the dielectric layer (working in ambient conditions), reversing the traditional approach to achieve both reliability and ease of manufacture

Inventive Principle:
Principle #13The other way round (Inversion)

3Manufacturing precision

If metal electrodes and metal filament conduction are used, then conductive pathways can be formed, but compatibility with CMOS fabrication processes is reduced

Engineering Contradiction:
Improveconductive pathway formationVSAvoidCMOS fabrication compatibility
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent replaces expensive and CMOS-incompatible metal electrodes with silicon-based electrodes that are compatible with standard CMOS fabrication, using readily available semiconductor materials instead of specialized metal layers

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent employs composite material structures combining silicon, silicon oxide, and silicon nitride layers to create both the electrodes and dielectric, forming conductive pathways through intrinsic material properties rather than metal filaments, achieving manufacturing precision while maintaining CMOS compatibility

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in low electroforming and switching voltages, high uniformity of resistance states, and enhanced endurance, with the textured boundary surface facilitating the formation of conductive filaments and stabilizing switching cycles, outperforming previous intrinsic SiOx ReRAM devices in terms of operational characteristics.

Implementation Method 1

promoting the formation of conductive pathways within the dielectric layer, enables intrinsic bulk resistance switching by enhancing columnar growth and oxygen mobility

Methodology Applied
Scientific EffectColumnar growth:

Implementation Method 2

enables intrinsic bulk resistance switching by enhancing columnar growth and oxygen mobility

Methodology Applied
Scientific EffectOxygen mobility: Diffusion

Implementation Method 3

promote the formation of a conductive pathway in the dielectric layer between the first electrode and the second electrode

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentEP3602561B1A switching resistor and method of making such a device
Publication Date: 2022.11.23 UCL BUSINESS LTD
  • EP3602561B1 patent drawingFigure 1(a)~1(c)
  • EP3602561B1 patent drawingFigure 2~3
  • EP3602561B1 patent drawingFigure 4(a)~4(e)

AI summary

A switching resistor has a low resistance state and a high resistance state. The switching resistor comprises a dielectric layer disposed between a first electrode and a second electrode. The switching resistor further comprises a textured boundary surface between the first electrode and the dielectric layer. The textured boundary surface promotes the formation of a conductive pathway in the dielectric layer between the first electrode and the second electrode.