Textured Buffer Layers for YBiPt (110) Spintronic SOT Stacks

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Solution Overview

Problem

Existing spintronic devices face challenges in achieving optimal crystal orientation and growth of YPtBi materials, which are crucial for high spin Hall angle applications, due to the need for specific buffer layers and processing conditions.

Innovation Solution

The use of textured buffer layers comprising bcc alloys like Ta, Nb, Hf, Mo, and W, and fcc nitride alloys with specific lattice spacings, along with growth templates such as MgO, TiN, and RuAl, to promote YBiPt in the (110) orientation, enhancing spin Hall angle in spin orbit torque (SOT) stacks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If specific buffer layers and processing conditions are used to achieve desired YPtBi crystal orientation, then spin Hall angle is improved, but device complexity increases

Engineering Contradiction:
Improvespin Hall angleVSAvoidbuffer layer configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the lattice parameter of the buffer layer by selecting materials with specific lattice constants (a=3.15 Å to a=3.32 Å for bcc alloys, a=4.45 Å to a=4.70 Å for fcc nitride alloys) to match and promote (110) orientation of YBiPt, thereby achieving high spin Hall angle without excessive complexity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite buffer layer structures combining multiple materials (bcc alloys like Ta/Nb/W, fcc nitride alloys like Ta3W2N/HfN, and template layers like MgO/TiN/RuAl) to achieve the desired crystal orientation and performance

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If textured buffer layers with specific lattice spacings are used to promote YBiPt (110) orientation, then manufacturing precision is improved, but ease of manufacture deteriorates

Engineering Contradiction:
Improvecrystal orientationVSAvoidbuffer layer fabrication
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent specifies precise lattice spacing parameters (a=3.15 Å to a=3.32 Å for bcc, a=4.45 Å to a=4.70 Å for fcc nitrides) to achieve (110) orientation, balancing manufacturing precision with material selection flexibility

Inventive Principle:
Principle #35Parameter changes

3Reliability

If multiple textured sub-layers and template layers are implemented in the buffer structure, then reliability of spin Hall effect is improved, but device complexity increases

Engineering Contradiction:
Improvespin Hall effectVSAvoidbuffer layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer layer is segmented into multiple functional sub-layers: texturing template layer (MgO/TiN/RuAl/YPt), bcc alloy sub-layers (Ta/Nb/W based with a=3.15-3.32 Å), and fcc nitride alloy sub-layers (Ta3W2N/HfN based with a=4.45-4.70 Å), each contributing to the overall (110) orientation and spin Hall effect reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses composite buffer structures combining template layers with bcc and fcc nitride alloy sub-layers to achieve enhanced spin Hall effect through synergistic crystal orientation control

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed buffer and interlayer configurations enable high-temperature applications of YBiPt-based SOT devices with improved spin Hall angles, suitable for magnetic sensors, logic designs, and memory cells like MRAM, by ensuring proper crystal orientation and stability.

Implementation Method 1

a buffer layer comprising a textured layer comprising a bcc alloy with lattice spacing in the range of about a=3.15 Å to a=3.32 Å

Methodology Applied
Scientific EffectLattice matching:

Data Source

PatentUS12505856B2Highly textured buffer layer to grow YBiPt (110) for spintronic applications
Publication Date: 2025.12.23 WESTERN DIGITAL TECHNOLOGIES INC
  • US12505856B2 patent drawing
  • US12505856B2 patent drawing
  • US12505856B2 patent drawing

AI summary

The present disclosure generally relates to spintronic material stacks and devices. The various disclosed embodiments of YBiPt based spin orbit torque (SOT) stacks can be used for high temperature applications. Disclosed herein are various buffer and/or interlayer configurations in spintronic stacks that can promote growth of YBiPt in the (110) orientation, to promote a high spin Hall angle (SHA) in SOT applications. One embodiment is a spintronic stack comprising a buffer layer comprising one or more layers, the one or more layers each individually comprising: MgO (100), TiN (100), Ta, Nb, HfN, Ta3W2 (110), TaW2 (100), Ta3W2N, TaW2N, or heated YPt, an SOT layer comprising YBiPt in the (110) orientation, an interlayer comprising one or more of MgO, Ta3WN, TaW3N, Ta3W (110), TaW3 (100), YPt (110), NiFeGeN, NiAlN, NiAl, NiFeGe, NiAlGe, or HfN, and a ferromagnetic layer.