Textured Gate Thin Film Transistor High Current

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing Thin Film Transistor (TFT) structures face challenges in achieving high current flow for fast turn-on speeds, with increasing aspect ratio or dielectric capacitance leading to parasitic capacitance and pinhole creation.

Innovation Solution

A textured TFT configuration is introduced, featuring a textured gate electrode with corrugations that modify the transistor's geometry, increasing current flow by altering charge distribution and electric field profiles, thereby enhancing turn-on speed and mobility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the aspect ratio of TFTs is increased to achieve higher currents, then current flow is improved, but parasitic capacitance increases

Engineering Contradiction:
Improvecurrent flowVSAvoidparasitic capacitance
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The gate electrode is textured with corrugations that create local variations in surface area and electric field distribution. This local quality change increases the effective gate area and capacitance without proportionally increasing parasitic capacitance, thereby improving current flow while minimizing energy loss.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The gate electrode transitions from a planar two-dimensional surface to a three-dimensional corrugated structure. This dimensional change increases the effective gate area and capacitance without increasing the planar footprint, allowing higher current flow without proportional increases in parasitic capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Power

If the channel length is reduced to increase aspect ratio and achieve higher currents, then current flow is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecurrent flowVSAvoidchannel length control
Core Design Contradiction:
PowerVSManufacturing precision

Solution Approach 1:

Instead of changing the channel length parameter, the invention changes the gate electrode surface area parameter through texturing. This allows increasing the effective gate area and current flow without modifying the channel length, thereby avoiding increased manufacturing precision requirements.

Inventive Principle:
Principle #35Parameter changes

3Power

If the dielectric is made thin to increase dielectric capacitance and achieve higher currents, then current flow is improved, but pinholes are created in the device structure

Engineering Contradiction:
Improvecurrent flowVSAvoiddevice structure integrity
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The gate electrode is textured with corrugations that increase the effective gate area in three dimensions. This allows increasing the gate capacitance without reducing the dielectric thickness, thereby improving current flow while maintaining device structure integrity and avoiding pinhole formation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The textured gate TFTs demonstrate faster turn-on and higher mobility, with increased current flow and leakage currents, overcoming the limitations of traditional TFT structures.

Implementation Method 1

The textured gate electrode is fabricated such that a surface is modified in its texture and/or geometry, to thereby affect the transistor current

Methodology Applied
Scientific EffectElectric Field: Electric Field

Data Source

PatentUS8766367B2Textured gate for high current thin film transistors
Publication Date: 2014.07.01 GENESEE VALLEY INNOVATIONS LLC
  • US8766367B2 patent drawing
  • US8766367B2 patent drawing
  • US8766367B2 patent drawing

AI summary

A textured thin film transistor is comprised of an insulator sandwiched between a textured gate electrode and a semi-conductor. A source electrode and drain electrode are fabricated on a surface of the semi-conductor. The textured gate electrode is fabricated such that a surface is modified in its texture and/or geometry, such modifications affecting the transistor current.