Textured PCB Test Pads for Reliable OSP Contact

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Solution Overview

Problem

Existing printed circuit board (PCB) test pads coated with organic solderability preservative (OSP) coatings face challenges in maintaining consistent electrical contact during testing, leading to reduced first pass yields and increased costs due to corrosion and the need for additional processing steps.

Innovation Solution

The PCB test pads are textured with dimples and vertical surfaces to enhance electrical contact, allowing probes to penetrate the OSP coating and establish a reliable connection, thereby increasing the conductive probe surface area and reducing contact resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a non-conductive corrosion-resistant coating (e.g., OSP) is applied to the test pad, then corrosion resistance is improved, but electrical contact quality deteriorates

Engineering Contradiction:
Improvecorrosion resistanceVSAvoidelectrical contact interference
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The test pad surface is textured with dimples that create localized regions with different properties. The peaks provide corrosion-resistant coating coverage while the valleys maintain exposed conductive material for electrical contact, achieving both corrosion resistance and good electrical contact simultaneously

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The surface is transformed from flat to three-dimensional with vertically extending surfaces and dimples. This dimensional change creates multiple contact points and pathways for electrical contact while maintaining corrosion protection on the outer surfaces

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Object-generated harmful factors

If a textured surface with vertical surfaces and dimples is created on the test pad, then electrical contact quality is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical contact interferenceVSAvoidpad structuring complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The test pad surface is segmented into multiple dimples arranged in a pattern. Each dimple creates localized vertical surfaces that enhance probe contact. This segmentation approach achieves the desired electrical contact improvement through a systematic, repeatable pattern that can be manufactured using standard PCB processes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The surface morphology is changed by controlling the depth, diameter, and spacing of dimples. By optimizing these parameters, the textured surface provides enhanced electrical contact while remaining compatible with existing PCB manufacturing capabilities

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If multiple test retries are performed to achieve sufficient testing yield, then testing accuracy is improved, but productivity decreases

Engineering Contradiction:
Improvetesting accuracyVSAvoidtesting throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The test pad surface is pre-textured during PCB manufacturing to ensure optimal electrical contact characteristics before testing. This preliminary action eliminates the need for multiple test retries by ensuring that the first test contact is successful, thereby maintaining high testing accuracy while maximizing productivity

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10893605B2Textured test pads for printed circuit board testing
Publication Date: 2021.01.12 SEAGATE TECH LLC
  • US10893605B2 patent drawing
  • US10893605B2 patent drawing
  • US10893605B2 patent drawing

AI summary

A printed circuit board includes a substrate and at least one electrical circuit provided at least partially on a surface layer of the printed circuit board. The electrical circuit includes an electrical trace that is in electrical connection with a test pad provided for accessibility on the surface layer, the test pad being sized and shaped for probing to test an aspect of the circuit, the test pad having a conductive probe surface that is structured to provide at least one vertical surface that extends from the probe surface toward the surface layer and thus providing an edge between the vertical surface and the probe surface, the probe surface having a coating of a material to protect the conductive probe surface from corrosion.