Textured Sapphire Substrate Light Extraction via Buried GaN Buffer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Group III nitride semiconductor light-emitting devices face challenges in improving light extraction efficiency while avoiding pit generation and electrical characteristic deterioration due to texture depth and inclination angle on sapphire substrates, which affects electrostatic breakdown voltage.
Innovation Solution
A method involving a textured sapphire substrate with a depth of 1 μm to 2 μm and an inclination angle of 40° to 80°, along with a buried GaN layer formed at a lower temperature to flatten the surface and prevent mass transport of the buffer layer, and a preventing layer to cover the buffer layer, effectively suppressing pit generation and enhancing light extraction efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the texture depth of the sapphire substrate is increased to improve light extraction efficiency, then light extraction efficiency is improved, but large pits are generated on regions where dislocations are concentrated, causing deterioration of electrical characteristics
Solution Approach 1:
A buffer layer is formed on the sapphire substrate before forming the Group III nitride semiconductor layers. This buffer layer prevents mass transport of sapphire atoms during subsequent high-temperature processing, thereby preventing pit generation while allowing the use of deep textures for improved light extraction efficiency
Solution Approach 2:
The buffer layer acts as an intermediary between the textured sapphire substrate and the Group III nitride semiconductor layers. It mediates the interaction by preventing direct mass transport from the sapphire to the semiconductor layers, thus eliminating the harmful effect of deep textures while preserving their beneficial light extraction effect
2Loss of energy
If the inclination angle of the texture side surface is increased to improve light extraction efficiency, then light extraction efficiency is improved, but regions without c-plane are increased, leading to generation of pits and uneven crystallinity
Solution Approach 1:
The buffer layer is formed in advance on the textured sapphire substrate with inclined side surfaces. This preliminary buffer layer prevents mass transport during subsequent processing, allowing the use of textures with inclination angles of 40° to 80° to improve light extraction without generating pits or uneven crystallinity in the final device
Solution Approach 2:
The buffer layer serves as an intermediary that protects the inclined texture regions from causing crystallinity problems. It prevents sapphire atoms from transporting to the Group III nitride semiconductor layers, thereby allowing steep inclination angles for light extraction while maintaining uniform crystallinity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively improves light extraction efficiency without reducing electrostatic breakdown voltage by suppressing pit generation and maintaining crystallinity, even with increased texture depth and inclination angles, leading to enhanced device performance.
Implementation Method 1
the light propagating in a horizontal direction can be emitted outside through reflection and scattering in a vertical direction by providing a texture on the sapphire substrate
Implementation Method 2
the light propagating in a horizontal direction can be emitted outside through reflection and scattering in a vertical direction by providing a texture on the sapphire substrate
Implementation Method 3
the buffer layer is moved to the c-plane of the sapphire substrate through mass transport
Data Source
AI summary
A method for producing a Group III nitride semiconductor light-emitting device includes an n-type layer, a light-emitting layer, and a p-type layer, each of the layers being formed of Group III nitride semiconductor, being sequentially deposited via a buffer layer on a textured sapphire substrate. A buried layer is formed of Group III nitride semiconductor on the buffer layer, at a temperature lower by 20° C. to 80° C. than the temperature of 1000° C. to 1200° C. when the n-type layer is deposited on the buried layer. The texture provided on the sapphire substrate may have a depth of 1 μm to 2 μm and a side surface inclined by 40° to 80°. A preventing layer may be formed of GaN at 600° C. to 1050° C. so as to cover the entire top surface of the buffer layer.


