TF32 Matrix Multiply-Accumulate for FP32 Precision Conversion

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Solution Overview

Problem

Deep learning and matrix operations often require specific data types that existing hardware accelerators, such as GPUs, cannot directly process, leading to inefficiencies like higher energy usage and latency due to the need for data conversion or operation on slower hardware.

Innovation Solution

The implementation of tensorfloat32 (TF32) matrix multiply-accumulate (MMA) operations that convert data inputs to facilitate MMA operations on parallel processing units like GPUs, allowing for efficient performance of matrix operations by decomposing FP32 inputs into TF32 operands and using TF32 MMA instructions to generate FP32 outputs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If data conversion operations are performed to prepare data to satisfy hardware criteria, then the data can be processed by the accelerator, but energy usage and latency increase

Engineering Contradiction:
Improvedata type compatibilityVSAvoidenergy usage
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent introduces a data type conversion mechanism that acts as an intermediary between the input data and the accelerator. The converter transforms data between different precision formats (e.g., FP32 to TF32) before processing, enabling the accelerator to handle diverse data types efficiently. This intermediary conversion layer resolves the contradiction by allowing the system to adapt to different data requirements while maintaining optimized processing paths that minimize energy consumption compared to using general-purpose processors.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If data conversion operations are performed to prepare data to satisfy hardware criteria, then the data can be processed by the accelerator, but latency increases

Engineering Contradiction:
Improvedata type compatibilityVSAvoidlatency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent implements preliminary data type conversion before the main processing operation. By converting data to the appropriate format (e.g., to TF32) in advance and storing it in a buffer, the system ensures that when the accelerator processes the data, no additional conversion time is needed. This preliminary action eliminates latency during the critical processing path, resolving the contradiction between data type adaptability and processing speed.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If other hardware is used to process data that does not satisfy accelerator criteria, then data processing can be performed, but processing speed decreases

Engineering Contradiction:
Improvedata type supportVSAvoidprocessing speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent changes the precision parameter of the data from standard FP32 to TF32 (tensor float 32) format. This parameter change enables the data to be processed by specialized accelerator hardware (tensor cores) that are optimized for this format, achieving significantly higher processing speeds compared to general-purpose processors. The system maintains compatibility by implementing conversion routines that transform data between formats as needed.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240095302A1Changing precision of operands
Publication Date: 2024.03.21 NVIDIA CORP
  • US20240095302A1 patent drawing
  • US20240095302A1 patent drawing
  • US20240095302A1 patent drawing

AI summary

Apparatuses, systems, and techniques to perform matrix multiply-accumulate (MMA) operations on data of a first type using one or more MMA instructions for data of a second type. In at least one embodiment, a single tensorfloat-32 (TF32) MMA instruction computes a 32-bit floating point (FP32) output using TF32 input operands converted from FP32 data values.