TFET Nanowire Intermittent Doping for Voltage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In tunnel field effect transistors (TFETs), the rising voltage of the switch element can shift to the negative side, and there is a need to operate with a small subthreshold voltage of 60 mV/digit or smaller while shifting the rising voltage to the positive side, while also ensuring easy manufacturing.

Innovation Solution

A TFET is designed with a group IV semiconductor substrate and a group III-V compound semiconductor nanowire, where a first region is formed by intermittently doping a suitable dopant at suitable intervals, creating a junction interface with a gate dielectric film, allowing for control of the conductivity type and subthreshold voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the first region is formed without doping to maintain interface quality, then the interface between substrate and nanowire remains clean, but the rising voltage shifts to the negative side

Engineering Contradiction:
Improveinterface qualityVSAvoidrising voltage control
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent applies periodic doping action by intermittently supplying dopant gas during nanowire growth to form a doped first region. This periodic doping introduces donor atoms at controlled intervals, shifting the rising voltage to the positive side while maintaining the tunneling interface quality for steep switching characteristics.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent changes the doping parameter by introducing a doped first region with specific donor atom concentration. This parameter change shifts the rising voltage from negative to positive side, resolving the voltage control issue while preserving the interface quality needed for TFET operation.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If doping is applied to shift rising voltage to positive side, then voltage control improves, but subthreshold voltage increases beyond 60 mV/digit

Engineering Contradiction:
Improverising voltage controlVSAvoidsubthreshold voltage
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by doping only the first region of the nanowire while keeping the second region undoped. This localized doping approach shifts the rising voltage to the positive side without degrading the overall subthreshold characteristics, maintaining the steep switching performance required for TFET operation.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses partial doping action by introducing dopant only in the first region rather than throughout the entire nanowire. This partial doping is sufficient to shift the rising voltage to the positive side while avoiding excessive doping that would degrade the subthreshold voltage and steep switching characteristics.

Inventive Principle:
Principle #16Partial or excessive action

3Ease of manufacture

If complex doping processes are used to control conductivity type, then conductivity control improves, but manufacturing complexity increases

Engineering Contradiction:
Improveconductivity type controlVSAvoidmanufacturing process
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the doping process with the nanowire growth process. By supplying dopant gas intermittently during the CVD growth of the first region, the doping and growth operations are combined into a single integrated process, avoiding separate complex doping steps and simplifying manufacturing.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs preliminary doping action by introducing dopant atoms during the nanowire growth process itself. This preliminary incorporation of dopant during growth eliminates the need for subsequent separate doping steps, reducing manufacturing complexity while achieving the desired conductivity type control.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The TFET operates with a small subthreshold voltage and a more positively shifted rising voltage, enabling improved integration and performance of semiconductor microprocessors with reduced power consumption.

Implementation Method 1

forming a gate electrode configured to apply an electric field for controlling flow of a carrier between a source electrode and a drain electrode to an interface between the group IV semiconductor substrate and the group III-V compound semiconductor nanowire

Methodology Applied
Scientific EffectElectric field: Electric Field

Implementation Method 2

A tunnel field effect transistor (TFET) uses a tunnel current for switching a transistor. Therefore, a TFET can perform steep on/off switching, and can operate with a low voltage.

Methodology Applied
Scientific EffectTunnel current:

Data Source

PatentEP3035374B1Tunnel field-effect transistor, method for manufacturing same, and switch element
Publication Date: 2022.10.05 THE JAPAN SCI & TECH AGENCY
  • EP3035374B1 patent drawingFigure 1
  • EP3035374B1 patent drawingFigure 2A~2B
  • EP3035374B1 patent drawingFigure 3A~3F

AI summary

A tunnel field-effect transistor (TFET) is configured by disposing a III-V compound semiconductor nano wire on a (111) plane of a IV semiconductor substrate exhibiting p-type conductivity, and arbitrarily disposing electrodes of a source, drain and gate. Alternatively, the tunnel field-effect transistor is configured by disposing a III-V compound semiconductor nano wire on a (111) plane of a IV semiconductor substrate exhibiting n-type conductivity, and arbitrarily disposing electrodes of a source, drain and gate. The nano wire is configured from a first region and a second region. For instance, the first region is intermittently doped with a p-type dopant, and the second region is doped with an n-type dopant.