Tunnel Barrier Layer in TFETs for Leakage Control

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Solution Overview

Problem

Tunnel field-effect transistors (TFETs) face challenges with high on-current resistance and leakage currents due to the intrinsic channel region between the source and drain, which is not adequately controlled by the gate, leading to inefficient switching and high operating voltages.

Innovation Solution

The formation of a tunnel barrier layer with a larger bandgap than the channel region between the drain and channel regions in TFETs, which reduces off-currents and enhances on-current switching by creating additional confinement and quasi-bound states, thereby improving the subthreshold swing and reducing ambipolar conduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an intrinsic channel region is used between source and drain in TFETs, then band-to-band tunnelling current blocking is achieved, but on-current resistance increases and device dimensions increase

Engineering Contradiction:
Improveleakage current blockingVSAvoidon-current resistance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The channel region is segmented into two distinct parts: a first channel region with a first bandgap and a second channel region with a second bandgap. This segmentation allows the first channel region to provide effective leakage blocking while the second channel region maintains lower on-current resistance, resolving the contradiction between reliable leakage blocking and low on-current resistance.

Inventive Principle:
Principle #1Segmentation

2Reliability

If an intrinsic channel region is used between source and drain, then leakage current blocking is improved, but device dimensions increase

Engineering Contradiction:
Improveleakage current blockingVSAvoiddevice dimensions
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

By dividing the channel into two regions with different bandgaps, the patent achieves effective leakage blocking in the first channel region without requiring an excessively long intrinsic channel. The second channel region with smaller bandgap allows for more efficient carrier transport, enabling compact device dimensions while maintaining reliable leakage blocking performance.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the tunnel region is made wider to block leakage current, then leakage blocking is improved, but on-current resistance increases

Engineering Contradiction:
Improveleakage current blockingVSAvoidon-current resistance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by creating different bandgap characteristics in different regions of the channel. The first channel region has a larger bandgap optimized for leakage blocking, while the second channel region has a smaller bandgap optimized for low on-current resistance. This local differentiation allows each region to perform its specific function optimally without compromising the other.

Inventive Principle:
Principle #3Local quality

4Ease of manufacture

If conventional MOSFET structures are used, then manufacturing simplicity is maintained, but subthreshold swing is limited to above 60 mV/dec

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidsubthreshold swing
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent employs a composite channel structure combining materials or regions with different bandgap properties. This composite approach enables subthreshold swing performance below the conventional 60 mV/dec limit while maintaining compatibility with existing TFET manufacturing processes, thus achieving both improved reliability and manufacturing simplicity.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The introduction of the tunnel barrier layer significantly reduces leakage currents and enhances the on/off current ratio, allowing for faster switching and lower operating voltages in TFETs.

Implementation Method 1

The formation of a tunnel barrier layer with a larger bandgap than the channel region between the drain and channel regions in TFETs, which reduces off-currents and enhances on-current switching by creating additional confinement and quasi-bound states

Methodology Applied
Scientific EffectQuantum mechanical confinement: Potential Well

Data Source

PatentUS10896974B2Method of fabricating semiconductor device
Publication Date: 2021.01.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10896974B2 patent drawing
  • US10896974B2 patent drawing
  • US10896974B2 patent drawing

AI summary

A method for fabricating a semiconductor device includes forming a channel region in a semiconductor substrate. The channel region is made of a first material. The method also includes forming source and drain regions in the semiconductor substrate. The method further includes forming a recess between the channel region and the drain region. The method further includes forming a tunnel barrier layer in the recess. The tunnel barrier layer is made of a second material, and a bandgap of the second material is greater than a bandgap of the first material. The method further includes forming a gate stack on the channel region.