TFT Aperture Ratio and Power Consumption Trade-off
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Solution Overview
Problem
Liquid crystal displays (LCDs) face challenges in achieving a high aperture ratio while minimizing power consumption, which affects driving margin and heat generation.
Innovation Solution
The display apparatus incorporates a specific layer structure including a gate electrode, insulating layers, impurity-doped semiconductor film patterns, source and drain electrodes, and a protection film pattern, along with a manufacturing method that forms these components to optimize the aperture ratio and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the aperture ratio is increased to improve display performance, then the data line load increases which causes power consumption to increase
Solution Approach 1:
The semiconductor layer is divided into two distinct parts: a first semiconductor layer and a second semiconductor layer. The first semiconductor layer has lower impurity concentration and forms the base channel, while the second semiconductor layer has higher impurity concentration and is positioned to reduce parasitic capacitance. This segmentation allows optimization of electrical properties without increasing aperture ratio, thereby reducing power consumption while maintaining display performance.
Solution Approach 2:
Different regions of the semiconductor structure are assigned different impurity concentrations to achieve specific local functions. The first semiconductor layer (lower impurity) provides the main channel for charge transport, while the second semiconductor layer (higher impurity) locally reduces parasitic capacitance at critical interfaces. This local quality differentiation optimizes electrical characteristics without requiring increased aperture ratio, thus resolving the power consumption issue.
2Area of stationary object
If the aperture ratio is increased, then more light can pass through but heat generation increases affecting driving margin
Solution Approach 1:
The semiconductor structure is segmented into two layers with different impurity concentrations. The first semiconductor layer handles the primary current conduction, while the second semiconductor layer with higher impurity concentration reduces parasitic capacitance at the interface with the data line. This reduces the overall power consumption and consequently decreases heat generation, allowing high aperture ratio designs without excessive heat issues.
Solution Approach 2:
The impurity concentration parameter is changed across different layers of the semiconductor structure. By increasing impurity concentration in the second semiconductor layer positioned near the data line interface, parasitic capacitance is reduced, which lowers power consumption and heat generation. This parameter change allows the aperture ratio to be increased without proportionally increasing heat generation, preserving driving margin.
Data Source
AI summary
A display apparatus includes a gate electrode, a first insulating layer pattern formed over the gate electrode, a second insulating layer pattern formed over the first insulating layer pattern, exposing a portion of the first insulating layer, a semiconductor film pattern formed over the second insulating layer pattern and over the first insulating layer pattern, an impurity-doped semiconductor film pattern formed on the semiconductor film pattern, wherein the impurity-doped semiconductor film pattern contacts the top surface of the semiconductor film pattern and exposes a portion of the semiconductor film pattern formed over the gate electrode, a source electrode and a drain electrode each formed over a portion of the impurity doped semiconductor film pattern, a protection film pattern formed over the source electrode and the drain electrode in a TFT area, the protection film pattern having a contact hole over the drain electrode, a pixel electrode pattern formed on the protection film pattern and_electrically connected to the drain electrode.