Thin Film Transistor Array with Carbon Nanotube and Segmented Semiconductor
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Solution Overview
Problem
Current thin film transistors with semiconductor materials like metal sulfides or transition metal oxides face challenges in forming a conductive network between electrodes due to high thickness, making them unsuitable for large-scale production.
Innovation Solution
A method involving semiconductor fragments with a few layers, typically 1 to 10 layers, are used to form a conductive network between source and drain electrodes, along with a carbon nanotube layer for improved conductivity and reduced thickness, allowing for better modulation by the gate electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor materials (metal sulfides or transition metal oxides) are used with more than hundreds of layers, then the material can form a complete layer structure, but the thickness becomes high and it is hard to form a conductive network between drain and source electrodes
Solution Approach 1:
The semiconductor layer is segmented into multiple thin layers (1-10 layers per layer) stacked in sequence. Each thin layer can form conductive pathways independently, and the stacked structure ensures complete coverage between electrodes while maintaining low overall thickness, solving the contradiction between conductive network formation and thickness control
Solution Approach 2:
The patent uses composite semiconductor structures comprising multiple thin layers of metal sulfides or transition metal oxides stacked together. This composite approach allows each thin layer to contribute to conductivity while the stacked configuration achieves both low thickness and complete conductive network formation between electrodes
2Length of stationary object
If thin semiconductor layers (1-10 layers) are used to reduce thickness, then conductivity and transparency improve, but the material may not provide sufficient coverage and modulation control
Solution Approach 1:
Multiple thin semiconductor layers are nested stacked in sequence, with each layer contributing to the overall function. The nested structure provides sufficient total coverage and modulation control while maintaining low individual layer thickness, enabling both transparency improvement and adequate gate electrode modulation
3Area of stationary object
If conventional thick semiconductor layers are used, then complete coverage is achieved, but transparency and sensitivity are reduced
Solution Approach 1:
The semiconductor coverage is achieved through segmentation into multiple thin stacked layers rather than a single thick layer. This segmentation provides complete area coverage between electrodes while each thin layer maintains high transparency, allowing light to pass through effectively
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the transparency, sensitivity, and on/off ratio of thin film transistors while reducing the semiconductor layer thickness and cost, facilitating easier fabrication and integration into electronic devices.
Implementation Method 1
A method involving semiconductor fragments with a few layers, typically 1 to 10 layers, are used to form a conductive network between source and drain electrodes, along with a carbon nanotube layer for improved conductivity
Data Source
AI summary
A method for making thin film transistor array includes following steps. A gate electrode is formed on a surface of the insulating substrate. An insulating layer is deposited on the insulating substrate to cover the gate electrode. A carbon nanotube layer is applied on the insulating layer. A number of source electrodes and a number of drain electrodes opposite with each other is formed by patterning the carbon nanotube layer. A semiconductor layer is formed by coating a semiconductor fragments suspension on the insulating layer, wherein the semiconductor layer comprises a number of semiconductor fragments located between the number of source electrodes and the number of drain electrodes.


