TFT Array Substrate with Compensation Capacitors for Feed-Through Voltage
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Solution Overview
Problem
Conventional TFT-LCD array substrates face issues with feed-through voltages due to parasitic capacitors, causing unintended gray scale display when pixel TFTs are turned off, as they either lower or raise voltage signals on pixel electrodes, deviating from intended gray scales.
Innovation Solution
The implementation of an array substrate design where every two adjacent rows of gate lines have alternating N-type and P-type TFTs, with compensation capacitors connected to each pixel electrode, one end to the pixel electrode and the other to a gate line in the next row, to minimize voltage changes and maintain intended gray scale display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional TFT-LCD array substrates use standard pixel circuits with parasitic capacitors, then the pixel electrodes can be driven by matrix rows and columns, but feed-through voltages occur when pixel TFTs are turned off, causing unintended gray scale display
Solution Approach 1:
The gate lines are divided into two independent sets: first gate lines (G1, G3, G5...) controlling first TFTs, and second gate lines (G2, G4, G6...) controlling second TFTs. This segmentation allows independent control of TFT turning on/off sequences, enabling the compensation mechanism where second TFTs remain on to block feed-through voltages while first TFTs are turned off.
Solution Approach 2:
The second TFTs are turned on in advance before the first TFTs are turned off. This preliminary action ensures that when the first TFTs are turned off, the second TFTs are already in the on state, creating a continuous conductive path that prevents feed-through voltages from affecting the pixel electrode voltage and causing gray scale errors.
2Loss of energy
If pixel TFTs are turned off to control display, then power consumption is reduced, but feed-through voltages lower or raise voltage signals on pixel electrodes, deviating from intended gray scales
Solution Approach 1:
The second TFTs act as intermediary components that remain on to block the harmful feed-through voltages from the parasitic capacitors. This intermediary structure allows the first TFTs to be turned off for power saving while the second TFTs maintain a conductive path that prevents voltage signal deviation, thus preserving gray scale accuracy.
3Manufacturing precision
If alternating N-type and P-type TFTs are used in adjacent rows, then feed-through voltage impact is reduced, but device structure becomes more complex
Solution Approach 1:
The patent changes the electrical parameters of the TFTs by using alternating N-type and P-type semiconductors in adjacent rows. This parameter change exploits the opposite polarity characteristics to create complementary control mechanisms, where the different transistor types respond differently to gate voltages, enabling the feed-through voltage compensation while maintaining a relatively simple overall structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces the impact of feed-through voltages, allowing pixel electrodes to drive liquid crystals to display gray scales closer to the intended values by compensating for voltage changes through overlapping scanning cycles and compensation capacitors.
Implementation Method 1
each of the pixel electrodes is arranged correspondingly with one of the compensation capacitors, and each of the compensation capacitors has one end electrically connected to the pixel electrode corresponding thereto and an other end electrically connected to a gate line in a next row
Data Source
AI summary
Embodiments of the invention provide an array substrate, a display panel, a display device and a method for driving an array substrate. The array substrate includes gate lines, data lines, pixel TFTs and pixel electrodes and compensation capacitors on the array substrate; in every two adjacent rows of gate lines in at least a part of the rows on the array substrate, pixel TFTs connected with one gate line are a first type of TFTs, and pixel TFTs connected with an other gate line are a second type of TFTs; and in the at least a part of the rows, each of the pixel electrodes is arranged correspondingly with one of the compensation capacitors, and each of the compensation capacitors has one end electrically connected to the pixel electrode corresponding thereto and another end electrically connected to a gate line in a next row.