Thin Film Transistor Array Substrate Data Linker Contact Resistance
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Solution Overview
Problem
The contact resistance characteristic of jumpers in thin film transistor array substrates is deteriorated due to the high sheet resistance of transparent electrode materials like indium tin oxide, affecting the performance of liquid crystal display devices.
Innovation Solution
The implementation of a thin film transistor array substrate design that includes gate lines, data lines, thin film transistors, pixel electrodes, gate pads, and data pads connected through passivation films and connection wiring, with specific contact holes and wiring configurations to enhance the contact resistance characteristic of jumpers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transparent electrode material (indium tin oxide) is used for the third conductive layer to form pixel electrodes, then the transparency and electrical conductivity are improved, but the sheet resistance becomes large which deteriorates the contact resistance characteristic of jumpers
Solution Approach 1:
The patent uses a composite structure where the third conductive layer is formed by stacking a transparent electrode material layer (indium tin oxide) and a reflective electrode material layer (aluminum) to create a transparent conductive oxide composite film. This composite structure reduces the overall sheet resistance while maintaining transparency, thereby improving the contact resistance characteristic of jumpers.
Solution Approach 2:
The patent changes the physical and chemical parameters of the third conductive layer by controlling the thickness and composition ratio of the transparent electrode material layer and reflective electrode material layer. By optimizing these parameters, the sheet resistance is reduced while maintaining the required transparency and electrical conductivity properties.
2Illumination intensity
If the third conductive layer is formed with transparent electrode material to maintain transparency, then the display quality is improved, but the contact resistance characteristic deteriorates due to large sheet resistance
Solution Approach 1:
The patent creates a composite film structure combining transparent electrode material (indium tin oxide) and reflective electrode material (aluminum) in the third conductive layer. This composite structure maintains the transparency required for display quality while the reflective layer contributes to reducing sheet resistance, thereby improving contact resistance characteristic.
Solution Approach 2:
The patent applies different materials with different properties to different regions or layers of the third conductive layer. The transparent electrode material layer provides transparency and basic conductivity, while the reflective electrode material layer provides additional conductivity pathways, creating local quality variations that collectively solve both transparency and contact resistance requirements.
Data Source
AI summary
A thin film transistor array substrate is disclosed. The thin film transistor array substrate includes: gate lines and data lines formed to cross each other in the center of a gate insulation film on a substrate and to define pixel regions; a thin film transistor formed at each intersection of the gate and data lines; a passivation film formed on the thin film transistors; a pixel electrode formed on each of the pixel regions and connected to the thin film transistor through the passivation film; a gate pad connected to each of the gate lines through a gate linker; and a data pad connected to each of the data lines through a data linker. The data pad is formed of a gate pattern, and the data line is formed of a data pattern. The data linker is configured to connect the data pad formed of the gate pattern with the data line formed of the data pattern using a connection wiring. Also, the data linker includes the gate pattern connected to the data pad, the data pattern formed opposite to the gate pattern in the center of the gate insulation film, and the connection wiring configured to connect the gate pattern with the data pattern through a first contact hole which exposes the data pattern and the gate pattern by penetrating through the passivation film and the gate insulation film.