Thin Film Transistor Array Panel Dummy Data Line Charge Management

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Solution Overview

Problem

Display devices with thin film transistor array panels face issues of light leakage and defects in color representation quality due to charge accumulation in dummy data lines, leading to luminance deterioration and color representation defects at the edges of the display area.

Innovation Solution

Incorporating dummy data lines in the peripheral area outside the display area, paired and connected to the main data lines through connection bridges, to prevent charge accumulation and reduce RC delay, thereby preventing light leakage and improving color representation by ensuring uniform luminance across the panel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dummy data lines are placed in the peripheral area, then charge accumulation is prevented and RC delay is reduced, but light leakage occurs at the edges of the display area

Engineering Contradiction:
Improvecharge accumulation preventionVSAvoidlight leakage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A light blocking member is introduced as an intermediary element between the dummy data lines and the display area. This member blocks light from leaking through the dummy data lines while allowing the dummy data lines to remain in the peripheral area for charge management purposes

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dummy data lines are segmented into multiple sections along their length. Different sections are selectively connected to data lines at different positions, allowing optimized charge management while minimizing light leakage impact on the display area

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If dummy data lines are connected to data lines, then color representation quality is improved, but device complexity increases

Engineering Contradiction:
Improvecolor representation qualityVSAvoidconnection structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Dummy data lines are selectively connected to data lines only at specific local positions where color representation defects occur. The connection pattern varies by location, with different numbers and positions of dummy data lines connected to different data lines based on local requirements

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Instead of connecting all dummy data lines to all data lines uniformly, only necessary connections are made at specific locations. This partial action approach achieves color representation improvement without the excessive complexity of universal connections

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9286820B2Thin film transistor array panel and display device including the same
Publication Date: 2016.03.15 SAMSUNG DISPLAY CO LTD
  • US9286820B2 patent drawing
  • US9286820B2 patent drawing
  • US9286820B2 patent drawing

AI summary

A thin film transistor array panel and a display device including the same are disclosed. In one aspect, the thin film transistor array panel includes a plurality of dots located in a display area, each of the plurality of dots including a plurality of pixels, and a plurality of data lines applying data voltages to the plurality of pixels. The thin film transistor array panel also includes a plurality of first dummy data lines located in a first peripheral area of a peripheral area around the display area, the plurality of first dummy data lines are adjacent to a first edge of the display area. The thin film transistor array panel further includes plurality of first data lines applying data voltages to the pixels included in a first dot adjacent to the first edge and are respectively connected to the plurality of first dummy data lines.