Thin Film Transistor Array Panel Etching with Non-Sulfur Fluorinated Gas
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Solution Overview
Problem
As display devices demand larger areas and higher pixelization, the increased length and decreased line width of wires in thin film transistor array panels lead to specific resistance and capacitance increases, causing signal delay and image distortion due to signal delay.
Innovation Solution
A manufacturing method for thin film transistor array panels involving the use of non-sulfur fluorinated gases for etching semiconductor and data wire material layers, with specific etching selectivity and gas combinations to form source and drain electrodes, and a passivation layer with contact holes to improve transistor characteristics and prevent metal residue formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If wire length is increased and line width is decreased to achieve larger display area and higher pixelization, then display area and pixel density are improved, but specific resistance and capacitance increase causing signal delay and image distortion
Solution Approach 1:
The patent changes the chemical composition parameters of the etching gas from conventional sulfur-containing gases to non-sulfur fluorinated gases. This parameter change modifies the etching chemistry to prevent metal residue formation while maintaining etching effectiveness, thereby improving signal quality without sacrificing display area expansion
Solution Approach 2:
The patent creates an inert etching environment by using non-sulfur fluorinated gases that do not react with metal layers to form residues. This inert chemical environment prevents harmful interactions between the etching process and metal conductors, reducing signal delay and maintaining reliability in large-area displays
2Ease of manufacture
If conventional etching methods are used to form source and drain electrodes, then manufacturing process is simple, but wire corrosion and metal residue formation occur degrading transistor characteristics
Solution Approach 1:
The patent modifies the etching gas parameters by substituting sulfur-containing gases with non-sulfur fluorinated gases. This chemical parameter change eliminates metal residue formation and wire corrosion while maintaining the overall etching process simplicity, thereby improving transistor characteristics without significantly complicating manufacturing
Solution Approach 2:
The patent substitutes the chemical mechanism of conventional etching (using sulfur-containing gases) with an alternative chemical mechanism (using non-sulfur fluorinated gases). This substitution replaces the harmful chemical interaction that causes metal residues with a clean etching process that preserves wire integrity and transistor performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively suppresses wire corrosion and metal residue formation, enhancing the characteristics of thin film transistors and reducing signal delay, thereby improving image quality in display devices.
Implementation Method 1
The etching the semiconductor material layer may include dry-etching by adding second gas including at least one of chlorine gas (Cl2), oxygen gas (O2), nitrogen gas (N2), or helium gas (He), to the first non-sulfur (S) fluorinated gas.
Implementation Method 2
The etching the data wire material layer by using the first photosensitive film pattern as a mask may include wet-etching.
Data Source
AI summary
A manufacturing method for a thin film transistor array panel includes: providing a gate line including a gate electrode, on a substrate; providing a gate insulating layer covering the gate line; providing a semiconductor material layer on the gate insulating layer; providing a data wire material layer on the semiconductor material layer; providing a first photosensitive film pattern on the data wire material layer; etching the data wire material layer by using the first photosensitive film pattern as a mask; providing a second photosensitive film pattern by etching back the first photosensitive film pattern; etching the semiconductor material layer by using the second photosensitive film pattern as a mask; and etching the data wire material layer by using the second photosensitive film pattern as a mask to form a source electrode and a drain electrode. The etching the semiconductor material layer uses a first non-sulfur fluorinated gas.