TFT Array Substrate Metal Loop Shielding Against Oxidation and Interference
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Solution Overview
Problem
Current manufacturing processes of thin film transistor array substrates lack effective measures to prevent oxidation and interference from external circuits while maintaining stability and do not optimize circuit wiring without additional costs.
Innovation Solution
A thin film transistor array substrate design incorporating a metal protection layer and a circuit loop formed by the source-drain metal layer, light shielding layer, and metal protection layer, which contacts both the source-drain metal layer and the light shielding layer, enhancing anti-oxidation and shielding external circuit interference without altering the original manufacturing steps or increasing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If additional shielding structures are added to prevent external circuit interference, then shielding effectiveness is improved, but manufacturing complexity and costs increase
Solution Approach 1:
The shielding function is merged into the existing protective layer structure rather than being implemented as a separate additional layer. The protective layer is formed between the source-drain metal layer and the light shielding layer, utilizing the existing manufacturing sequence and material deposition processes, thereby achieving shielding without increasing overall manufacturing complexity
Solution Approach 2:
The protective layer inherently provides both oxidation protection and interference shielding functions through its material composition and positioning within the device structure. The same layer that protects against oxidation also serves as the shielding barrier against external circuit interference, eliminating the need for separate shielding structures
Data Source
AI summary
A thin film transistor array substrate includes a base substrate, a light shielding layer, a semiconductor layer, a gate insulating layer, a gate layer, and a source-drain metal layer in contact with the semiconductor layer and in contact with the light shielding layer sequentially disposed on the base substrate, a first insulating layer covering the source-drain metal layer disposed on the base substrate, and a metal protection layer disposed on the first insulating layer. The semiconductor layer, the gate layer, and the source-drain metal layer form a thin film transistor. An end of the metal protection layer is in contact with the source-drain metal layer, and another end of the metal protection layer is in contact with the light shielding layer.