Thin Film Transistor Array Panel Passivation Layer Ashing
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Solution Overview
Problem
In thin film transistor array panels for flat panel displays, such as LCDs and OLEDs, the organic insulating layers are prone to charge accumulation after processing steps like etching and Ar plasma treatments, leading to afterimage issues during operation.
Innovation Solution
A method for manufacturing a thin film transistor array panel involving the formation of a thin film transistor with specific electrode structures and passivation layers, including an organic first passivation layer and an inorganic second passivation layer, where the transparent conductive layer is etched using a photoresist mask to form a pixel electrode connected to the drain electrode, and the ashing process ensures the exposed surface of the passivation layer is lower than the surface under the pixel electrode, thereby preventing charge accumulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the organic insulating layer is used for interlayer insulation, then the signal interference between different wires is minimized, but charge accumulation occurs after etching and plasma treatments causing afterimage issues
Solution Approach 1:
The patent extracts and removes the exposed surface portion of the organic insulating layer through ashing treatment after etching the transparent conductive layer. This extraction eliminates the charged surface that causes afterimage, while preserving the bulk insulating function of the layer.
Solution Approach 2:
The patent applies ashing treatment as a preliminary cleaning step before final inspection or assembly. By removing the exposed charged surface early in the process, subsequent afterimage issues are prevented before they can affect display quality.
2Area of moving object
If the pixel electrode overlaps the wires to improve aperture ratio, then the aperture ratio is improved, but parasitic capacitance increases between the pixel electrode and wires
Solution Approach 1:
The patent uses the organic insulating layer as an intermediary substance between the pixel electrode and the underlying wires. This intermediate layer provides electrical insulation that reduces parasitic capacitance while allowing the electrode to overlap the wires for improved aperture ratio.
3Ease of manufacture
If the exposed surface of the passivation layer is left at the same level as the surface under the pixel electrode, then the manufacturing process is simpler, but charge accumulation occurs leading to afterimage
Solution Approach 1:
The patent applies different surface treatments to different regions of the passivation layer. The exposed surface portion is selectively removed through ashing to create a lower surface level that prevents charge accumulation, while the covered surface maintains its original level for proper electrical connection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents charge accumulation and afterimage issues, enhancing the operational stability and quality of the thin film transistor array panels by ensuring the surface of the passivation layer is properly processed to eliminate residual charges.
Implementation Method 1
etching the transparent conductive layer using a photoresist as an etch mask
Implementation Method 2
ashing the first passivation layer and the photoresist
Data Source
AI summary
A method of manufacturing a thin film transistor array panel is provided, which includes: forming a thin film transistor including a gate electrode, a drain electrode, a source electrode and a semiconductor on a substrate; forming a first passivation layer on the drain and the source electrodes; forming a transparent conductive layer on the first passivation layer; etching the transparent conductive layer using a photoresist as an etch mask to expose the portion of the first passivation layer and to form a pixel electrode connected the drain electrode; ashing the first passivation layer and the photoresist; and removing the photoresist.