TFT Array Panel Multi-Layer Conductive Structure
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Solution Overview
Problem
Existing thin film transistor (TFT) array panels face challenges in achieving high signal conducting capability and miniaturization while maintaining device performance, particularly in large-size and high-definition display applications, due to limitations in the electrical resistance and impedance of signal conducting lines.
Innovation Solution
The implementation of a multi-layered conductive structure with specific indium-to-zinc content ratios in the sub-layers of the second conductive layer, which affects the lateral etch profile and enhances structural integrity and electrical properties, including the use of indium-tin oxide (ITO) and indium-zinc oxide (IZO) materials, and the integration of additional sub-layers to improve adhesiveness and diffusion barrier properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the signal conducting lines are miniaturized to increase display resolution, then the display resolution is improved, but the electrical resistance and impedance of the signal conducting lines increase
Solution Approach 1:
The patent employs a multi-layered conductive structure comprising ITO, IZO, and Mo sub-layers with specific thicknesses and indium-to-zinc content ratios. This composite material approach reduces electrical resistance and impedance while maintaining miniaturized line dimensions, thereby improving signal conducting capability without sacrificing display resolution
Solution Approach 2:
The patent optimizes the indium-to-zinc content ratio in the IZO sub-layers and controls the thickness of each sub-layer to precisely tune the electrical properties of the conductive lines. By adjusting these parameters, the signal conducting capability is enhanced while maintaining the miniaturized structure required for high display resolution
2Reliability
If the multi-layered conductive structure is implemented to reduce electrical resistance, then the signal conducting capability is improved, but the device complexity increases
Solution Approach 1:
The conductive layer is segmented into multiple sub-layers (ITO, IZO, Mo) with distinct functions. Each sub-layer contributes differently to the overall electrical properties, allowing optimization of signal conducting capability while managing complexity through functional segmentation rather than a single complex material system
3Reliability
If the indium to zinc content ratio is optimized to improve charge carrier mobility, then the electrical properties are enhanced, but the manufacturing precision requirements increase
Solution Approach 1:
The patent specifies precise indium-to-zinc content ratios (e.g., 30:70 to 70:30) in the IZO sub-layers to optimize charge carrier mobility. By establishing clear parameter ranges and ratios, the patent balances the need for enhanced electrical properties with achievable manufacturing precision in controlling material composition
Data Source
AI summary
A semiconductor device comprises a multi-layered structure disposed over a substrate (101) and defining a composite lateral etch profile. The multi-layered structure includes a lower sub-layer (105-1) disposed over the substrate (101) and comprising a metal oxide material that includes indium and zinc, the indium and zinc content in the lower sub-layer (105-1) substantially defining a first indium to zinc content ratio; a middle sub-layer (105-2) disposed over the lower sub-layer (105-1) and comprising a metal material; an upper sub-layer (105-3) disposed over the middle sub-layer (105-2) and comprising a metal oxide material that includes indium and zinc, the indium to zinc content in the upper sub-layer (105-3) substantially defining a second indium to zinc content ratio smaller than the first indium to zinc content ratio; and a lateral byproduct layer formed over the lateral etched surface, comprising substantially an metal oxide of the metal material in the middle sub-layer (105-2).