Thin Film Transistor Array Panel High-K Gate Insulator
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current liquid crystal display (LCD) manufacturing processes are complex and costly due to the need for separate photomasks to form pixel and reference electrodes, and the thickness of insulating layers affects driving voltage efficiency, leading to lower transmittance.
Innovation Solution
A thin film transistor array panel design with a high relative permittivity gate insulating layer (>15) and passivation layer (>4.0) of specific thicknesses, integrated with a pixel electrode and reference electrode on a single substrate, using materials like hafnium oxide and silicon oxide, and branch electrodes to optimize electric field generation without increasing driving voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If separate photomasks are used to form pixel electrode and reference electrode, then electrode formation is achieved, but manufacturing cost increases and process complexity increases
Solution Approach 1:
The patent merges the formation of pixel electrode and reference electrode into a single photomask process. The pixel electrode and reference electrode are patterned simultaneously using one photomask, eliminating the need for separate photomasks and reducing manufacturing complexity while maintaining electrode functionality.
Solution Approach 2:
The single photomask is designed to perform multiple functions: it simultaneously defines both the pixel electrode pattern and the reference electrode pattern. This multi-functional approach consolidates what would traditionally require separate masking steps into one unified process.
2Reliability
If insulating layer thickness is increased, then insulation performance is improved, but driving voltage must increase reducing LCD efficiency
Solution Approach 1:
The patent optimizes the insulating layer thickness to a specific range (500-2000 nm) that balances insulation performance with electrical field generation efficiency. By precisely controlling the thickness parameter within this range, the patent achieves adequate insulation while minimizing the voltage required to generate the necessary electric field between electrodes.
Solution Approach 2:
The patent uses composite insulating layer structures combining different materials (such as silicon oxide and silicon nitride) with different dielectric properties. This allows optimization of both insulation performance and electrical characteristics, achieving high insulation with thinner overall thickness to maintain driving voltage efficiency.
3Illumination intensity
If insulating layer thickness is reduced to increase transmittance, then transmittance increases, but insulation performance deteriorates
Solution Approach 1:
The patent employs composite insulating layers with materials having different optical and electrical properties. Materials like silicon oxide provide good optical transparency, while combinations with silicon nitride enhance dielectric strength. This composite approach allows thin overall thickness for high transmittance while maintaining adequate insulation through high-k materials.
Solution Approach 2:
The patent carefully controls the thickness parameter of the insulating layer within the 500-2000 nm range, and also adjusts the dielectric constant parameter by material selection. This dual parameter optimization allows the layer to be thin enough for high light transmittance while maintaining sufficient electrical insulation through high dielectric constant materials.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design simplifies manufacturing, increases transmittance, and maintains efficiency by reducing the thickness of insulating layers and optimizing the ratio of electrode width to interval, thereby enhancing the overall performance of the LCD.
Implementation Method 1
Relative permittivity (ε) of the gate insulating layer is more than about 15
Implementation Method 2
Relative permittivity (ε) of the passivation layer may be more than about 4.0
Implementation Method 3
The LCDs display images by applying voltages to field-generating electrodes to generate an electric field in an LC layer that determines orientations of LC molecules therein, to adjust polarization of incident light
Data Source
AI summary
A thin film transistor array panel includes an insulation substrate; a gate line and a first electrode on the insulation substrate; a gate insulating layer on the gate line and the first electrode; a data line on the gate insulating layer; a passivation layer on the gate insulating layer and the data line; and a second electrode on the passivation layer. Relative permittivity (ε) of the gate insulating layer is more than about 15, and a thickness of the gate insulating layer is about 2000 angstroms.