Thin Film Transistor Array Panel with Semiconductor Passivation Layer
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Solution Overview
Problem
The performance of thin film transistors is deteriorated due to exposure of the semiconductive oxide layer to moisture, external ions, or oxygen during the manufacturing process, leading to adverse chemical reactions that affect electrical conductivity.
Innovation Solution
A thin film transistor design where a semiconductive oxide layer is covered by a semiconductor passivation layer, both deposited using a sputtering method under continuous vacuum conditions, with the passivation layer having the same island shape as the oxide layer, preventing exposure to contaminants during patterning and electrode formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the semiconductive oxide layer is exposed to moisture, external ions, or oxygen during the manufacturing process, then the manufacturing process can proceed with standard photolithography and etching, but the electrical conductivity characteristics of the semiconductive oxide region are adversely changed due to chemical oxidation or reduction reactions
Solution Approach 1:
A semiconductor-containing passivation layer is introduced as an intermediary protective layer between the semiconductive oxide layer and the external environment. This passivation layer acts as a barrier that prevents moisture, external ions, and oxygen from directly contacting the semiconductive oxide layer during photolithography and etching processes, thereby maintaining electrical conductivity while allowing standard manufacturing procedures to continue
Solution Approach 2:
The patent employs continuous vacuum conditions during the sputtering deposition process to create an inert environment that prevents oxidation and contamination of the semiconductive oxide layer. By maintaining vacuum throughout the deposition of both the semiconductive oxide layer and the passivation layer, the process eliminates exposure to reactive gases that would otherwise cause harmful chemical reactions
2Productivity
If the channel-defining layer is exposed to moisture or external contaminating ions during manufacturing, then standard processing can be used, but chemical oxidation or reduction reactions occur that deteriorate transistor performance
Solution Approach 1:
The passivation layer is deposited over the semiconductive oxide layer before any photolithography or etching operations begin. This preliminary protective action ensures that the channel-defining semiconductive oxide layer is already shielded from moisture and external contaminants before the manufacturing process starts, preventing chemical reactions while allowing subsequent standard processing steps to proceed efficiently
Solution Approach 2:
Continuous vacuum conditions are maintained during sputtering deposition to create an inert environment that prevents harmful chemical reactions between the semiconductive oxide layer and external contaminants such as moisture and ions, thereby maintaining material integrity while enabling standard manufacturing procedures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents exposure of the channel region to moisture and contaminants, thereby maintaining the electrical conductivity and performance of the semiconductive oxide layer, enhancing the reliability and durability of the thin film transistors.
Implementation Method 1
sputter depositing a semiconductive oxide layer on the gate insulating layer; sputter depositing an insulating layer on the semiconductive oxide layer
Implementation Method 2
both deposited using a sputtering method under continuous vacuum conditions
Data Source
AI summary
A thin film transistor and a manufacturing method thereof are provided. In the manufacturing method of the thin film transistor a semiconductive active layer and a semiconductor passivation layer are sequentially formed such that the semiconductor passivation layer protectively covers the semiconductive active layer. Then the stacked combination of the semiconductive active layer and semiconductor passivation layer are patterned by using a same patterning mask so that formed islands of the semiconductive active layer continue to be protectively covered by formed islands of the semiconductor passivation layer. In one embodiment, the semiconductive active layer is formed of a semiconductive oxide.