Thin Film Transistor Array Panel Plasma Stabilization
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Solution Overview
Problem
The existing thin film transistor array panels face challenges in stabilizing transistor characteristics due to contamination of the channel layer by wiring materials, particularly when using oxide semiconductors, which affects charge mobility and uniformity, especially in large-sized panels.
Innovation Solution
A thin film transistor array panel design incorporating a substrate with a gate line, semiconductor layer, data wire layer, and passivation layers, where a plasma pre-treatment with oxygen is performed to stabilize the channel layer, and the passivation layers are strategically positioned to prevent contamination and enhance transistor stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a plasma pre-treatment is performed to stabilize the channel layer containing oxide semiconductor, then the thin film transistor characteristic is improved, but the channel layer is contaminated by reacting with exposed wiring material surface
Solution Approach 1:
A protective film is formed on the wiring material before the plasma pre-treatment of the channel layer. This preliminary protective action prevents the wiring material surface from being exposed during plasma treatment, thereby avoiding contamination of the channel layer while still allowing the plasma to stabilize the oxide semiconductor effectively
Solution Approach 2:
The protective film acts as an intermediary layer between the plasma environment and the wiring material surface. It allows the plasma to interact with and stabilize the oxide semiconductor channel layer without directly exposing the wiring material to the plasma, thus preventing contamination while maintaining the beneficial effects of plasma treatment
2Reliability
If oxide semiconductor is used for high charge mobility, then transistor performance is improved, but contamination from wiring materials deteriorates the characteristic
Solution Approach 1:
The protective film is formed on the wiring material in advance before any plasma treatment that could cause contamination. This preliminary protection ensures that when the oxide semiconductor channel layer is later subjected to plasma treatment for mobility enhancement, the wiring material surface remains covered and does not contaminate the high-purity oxide semiconductor
Solution Approach 2:
The protective film serves as a mediator that enables the plasma treatment to enhance oxide semiconductor charge mobility without allowing direct contact between plasma-generated reactive species and the wiring material surface, thus maintaining channel layer purity while achieving high charge mobility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents contamination of the channel layer, stabilizes transistor characteristics, and improves charge mobility and uniformity, enabling the production of high-performance thin film transistors with reduced costs and increased scalability.
Implementation Method 1
A plasma pre-treatment is performed to stabilize a channel layer containing an oxide semiconductor
Data Source
AI summary
An exemplary embodiment provides a thin film transistor array panel including: a substrate; a gate line; a semiconductor layer; a data wire layer; a first passivation layer; and a second passivation layer. The gate line is disposed on the substrate and includes a gate electrode. The semiconductor layer is disposed on the substrate. The data wire layer is configured to include a data line disposed on the substrate to cross the gate line, a source electrode connected to the data line, and a drain electrode disposed to face the source electrode. The first passivation layer is disposed on a channel region between the source electrode and the drain electrode. The second passivation layer is disposed on the first passivation layer, the source electrode, and the drain electrode. A width of the first passivation layer disposed on the channel region is equal to or smaller than a distance between the source electrode and the drain electrode.