Thin Film Transistor Array Panel Single Mask Etching
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Solution Overview
Problem
The manufacturing process of thin film transistor array panels with two field generating electrodes is complex and costly due to the need for multiple etching steps and masks, which complicates the formation of the gate conductor and field generating electrodes on a single substrate.
Innovation Solution
A method involving the simultaneous formation of the gate conductor and first electrode using a non-peroxide-based etchant, with a dual-layer structure where the lower layer of the gate conductor is made from the same material as the first electrode, simplifying the etching process and reducing manufacturing complexity by using a single mask for both layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple etching steps and masks are used to form gate conductor and field generating electrodes separately, then the electrodes can be formed with precise control, but the manufacturing process becomes complex and costly
Solution Approach 1:
The patent combines the formation of the gate conductor and the first field generating electrode into a single etching step using a common mask pattern. The mask is designed to define both the gate conductor regions and the first electrode regions simultaneously, allowing both structures to be formed from the same conductive layer in one process step, thereby reducing manufacturing complexity while maintaining precision
Solution Approach 2:
The mask used in the etching process serves multiple functions: it defines the gate conductor patterns, defines the first electrode patterns, and establishes the spatial relationship between these structures. This multi-functional mask design eliminates the need for separate masks for each structure, simplifying the overall manufacturing process
2Manufacturing precision
If multiple etching steps and masks are used to form gate conductor and field generating electrodes separately, then the electrodes can be formed with precise control, but manufacturing costs increase
Solution Approach 1:
The patent combines the formation of the gate conductor and the first field generating electrode into a single etching step using a common mask pattern. The mask is designed to define both the gate conductor regions and the first electrode regions simultaneously, allowing both structures to be formed from the same conductive layer in one process step, thereby reducing manufacturing complexity while maintaining precision
Solution Approach 2:
The patent eliminates the need for separate masks and etching steps that would otherwise be required for forming gate conductors and electrodes independently. By using a single mask design that serves multiple purposes, the process discards redundant manufacturing steps and materials, thereby reducing overall manufacturing costs
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces costs, and effectively forms the necessary layers for a thin film transistor array panel, enhancing the efficiency of the production process while maintaining the required electrical properties.
Implementation Method 1
simultaneously etching the first metal layer and the second metal layer with a first non-peroxide-based etchant
Data Source
AI summary
A manufacturing method of a thin film transistor array panel includes: simultaneously forming a gate conductor and a first electrode on a substrate, using a non-peroxide-based etchant; forming a gate insulating layer on the gate conductor and the first electrode; forming a semiconductor, a source electrode, and a drain electrode on the gate insulating layer; forming a passivation layer on the semiconductor, the source electrode, and the drain electrode; and forming a second electrode layer on the passivation layer.