TFT Array Panel Insulating Layer Trenches for LCD Disclination
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Solution Overview
Problem
Liquid crystal display (LCD) panels experience disclination due to disorderly arranged LC molecules at the edges of the display region, which is currently addressed by increasing the width of the light blocking layer, but this reduces the aperture ratio of pixels, necessitating a solution that minimizes disclination without decreasing the aperture ratio.
Innovation Solution
A thin film transistor array panel design featuring an insulating substrate with gate lines, data lines, and a light blocking layer, where the insulating layer has openings or trenches between pixel electrodes, made of organic material, and a passivation layer with contact holes to connect pixel electrodes to drain electrodes, maximizing aperture ratio while minimizing light leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the width of the light blocking layer is increased to reduce disclination, then the disclination is improved, but the aperture ratio of the pixels is reduced
Solution Approach 1:
The insulating layer is segmented by forming openings or trenches at specific locations between pixel electrodes. This segmentation allows the light blocking function to be localized at the openings while the rest of the insulating layer remains intact, thus preventing disclination without requiring a uniformly increased light blocking layer width that would reduce aperture ratio.
Solution Approach 2:
The light blocking function is applied locally at the openings or trenches in the insulating layer rather than uniformly across the entire light blocking layer. This local application of light blocking precisely at the edges where disclination occurs eliminates the need to increase the overall light blocking layer width, thereby maintaining high aperture ratio while effectively reducing disclination.
2Area of stationary object
If the aperture ratio is maximized by reducing the light blocking layer width, then the aperture ratio is improved, but disclination increases
Solution Approach 1:
The insulating layer is divided into regions with openings and regions without openings, allowing the light blocking function to be concentrated at specific locations (openings) rather than distributed uniformly. This enables minimal light blocking width while maintaining effective disclination prevention.
Solution Approach 2:
The openings or trenches in the insulating layer act as intermediary structures that provide light blocking functionality at critical locations. These openings serve as mediators between the pixel electrodes, preventing direct interaction that causes disclination while occupying minimal space, thus preserving aperture ratio.
3Reliability
If openings or trenches are formed in the insulating layer, then light leakage is reduced and disclination is minimized, but the manufacturing process becomes more complex
Solution Approach 1:
The openings or trenches are formed in the insulating layer during the manufacturing process at an early stage, before final assembly. This preliminary formation of openings integrates the light blocking function into the base structure, avoiding the need for additional separate light blocking components and reducing overall manufacturing complexity despite the added step.
Solution Approach 2:
The light blocking function is merged with the insulating layer by forming openings directly in it, rather than adding a separate light blocking layer. This merging of functions reduces the total number of manufacturing steps and simplifies the overall process, as the insulating layer simultaneously provides both insulation and light blocking capabilities at specific locations.
Data Source
AI summary
A thin film transistor array panel includes an insulating substrate, a plurality of gate lines formed on the substrate, a plurality of data lines, and an insulating layer. Each of the gate lines include a plurality of gate electrodes. The data lines cross the gate lines with insulation therebetween. Each of the data lines include a plurality of source electrodes. A plurality of drain electrodes face the source electrodes. The insulating layer is formed on the gate lines, the data lines, and the drain electrodes. A plurality of pixel electrodes are formed on the insulating layer and connected to the drain electrodes. The insulating layer has an opening or a trench and the opening or the trench is disposed in a part of the insulating layer that is not covered by the pixel electrodes.