TFT Array Substrate Using Boron-Doped SiGe Seed Layer
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Solution Overview
Problem
Current methods for manufacturing poly-Si thin films for TFTs face challenges such as high defect density, high costs, metal residual issues, and reduced production efficiency due to high crystallization temperatures, which can cause substrate deformation and prolong crystallization time.
Innovation Solution
A method using solid-phase crystallization (SPC) with a thermal annealing process at 500 to 1000°C for 5 to 60 minutes to convert amorphous silicon and boron-doped amorphous silicon germanium thin films into polycrystalline silicon and polycrystalline silicon germanium thin films, respectively, while forming a patterned active layer to reduce crystallization temperature and shorten processing time, thereby avoiding substrate deformation and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If solid-phase crystallization is performed at high temperature to obtain large grain size poly-Si thin film, then the migration rate increases, but the base substrate deforms and crystallization time increases
Solution Approach 1:
The patent changes the crystallization temperature parameter from conventional high temperature (700-900°C) to low temperature (450-550°C) by introducing a novel crystallization method using a specific atmosphere (nitrogen gas flow) and a seed layer structure, achieving large grain size poly-Si without substrate deformation
Solution Approach 2:
The patent introduces a seed layer as an intermediary between the amorphous silicon layer and the substrate. This seed layer facilitates crystallization at lower temperatures by providing nucleation sites, enabling the formation of large grain size poly-Si without requiring high temperatures that would deform the substrate
2Reliability
If excimer laser anneal is used to manufacture poly-Si thin film, then the defect state density decreases, but the manufacturing cost increases
Solution Approach 1:
The patent replaces expensive excimer laser equipment with a cost-effective thermal field treatment method using nitrogen gas flow and a simple heating process. The seed layer is a disposable, easily deposited material that enables low-cost crystallization without requiring expensive laser equipment
Solution Approach 2:
The patent substitutes the mechanical/optical system of excimer laser annealing with a thermal field-based crystallization process using controlled nitrogen gas flow and moderate heating, achieving similar or better results at lower cost
3Ease of manufacture
If metal induced crystallization is used to manufacture poly-Si thin film, then the crystallization process is simplified, but metal residual increases and TFT characteristics worsen
Solution Approach 1:
The patent completely removes metal elements from the crystallization process. Instead of using metal-induced crystallization, it employs a seed layer made of silicon-based material and nitrogen gas flow to achieve crystallization, eliminating metal residual and its harmful effects on TFT characteristics
Solution Approach 2:
The patent changes the crystallization mechanism from metal-induced to nitrogen gas flow-assisted thermal crystallization, maintaining process simplicity while eliminating the harmful side effects of metal residual through a fundamental change in the crystallization approach
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces substrate deformation and shortens crystallization time, enhancing production efficiency and maintaining the quality of TFTs while lowering costs by using a boron-doped amorphous silicon germanium thin film to induce crystallization in the amorphous silicon thin film.
Implementation Method 1
performing crystallization on the a-Si thin film layer and the B-doped a-SiGe thin film layer using a thermal annealing process to convert the a-Si thin film layer into a polycrystalline silicon (poly-Si) thin film layer
Implementation Method 2
performing crystallization on the a-Si thin film layer and the B-doped a-SiGe thin film layer using a thermal annealing process
Data Source
AI summary
The present disclosure discloses a method of manufacturing a thin film transistor (TFT) array substrate including a step of preparing a patterned active layer on a base substrate, wherein the step includes: sequentially forming an amorphous silicon (a-Si) thin film layer and a boron-doped (B-doped) amorphous silicon germanium (a-SiGe) thin film layer on the base substrate; performing crystallization on the a-Si thin film layer and the B-doped a-SiGe thin film layer using a thermal annealing process to obtain a polycrystalline silicon (poly-Si) thin film layer and a B-doped polycrystalline silicon germanium (poly-SiGe) thin film layer; and forming the patterned active layer by using a photolithography process to etch the poly-Si thin film layer and the B-doped poly-SiGe thin film layer. The present disclosure further discloses a TFT array substrate and a display device including the TFT array substrate.