TFT Array Substrate Extension Portion for Capacitance Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional thin film transistor (TFT) designs face challenges in maintaining stable capacitance between the gate and source electrodes, leading to potential fluctuations that cause flickering in TFT-LCD displays, which existing compensation schemes struggle to address without increasing the load on the gate line or reducing the aperture ratio.
Innovation Solution
The proposed solution involves an array substrate design where the source electrode extends beyond the gate electrode with a supplementary extension portion, forming a stable capacitance without overlapping regions, allowing for a constant capacitance without increasing the gate line load or reducing the aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional TFT design is used with gate and source electrodes, then the device can be manufactured, but the capacitance Cgs becomes unstable causing flickering
Solution Approach 1:
The source electrode is segmented into two distinct parts: a main body portion and an extension portion. The extension portion specifically overlaps with the gate electrode to provide stable capacitance, while the main body portion maintains the electrical connection function. This segmentation allows the capacitance function to be isolated and optimized independently.
Solution Approach 2:
The source electrode is extended in the vertical dimension (thickness direction) to create an overlapping region with the gate electrode. This dimensional change transforms the electrode configuration from a planar layout to a three-dimensional structure, enabling the formation of a stable capacitance region without increasing the planar footprint.
2Reliability
If Cgs compensation design is applied to ensure stable capacitance, then flickering is prevented, but the aperture ratio of the pixel is reduced
Solution Approach 1:
The source electrode is extended in the vertical dimension (thickness direction) to create an overlapping region with the gate electrode. This dimensional change transforms the electrode configuration from a planar layout to a three-dimensional structure, enabling the formation of a stable capacitance region without increasing the planar footprint.
Solution Approach 2:
The extension portion of the source electrode is nested within the vertical space occupied by the gate electrode structure. The extension portion overlaps with the gate electrode in the thickness direction, effectively utilizing the existing vertical space to create capacitance without encroaching on the pixel aperture area.
3Reliability
If Cgs compensation design is applied to ensure stable capacitance, then flickering is prevented, but the load on the gate line increases
Solution Approach 1:
The source electrode is designed with non-uniform properties: the extension portion has specific dimensional characteristics (length L1, width W2) optimized for capacitance formation, while the main body portion maintains standard dimensions for electrical connection. This local differentiation allows the capacitance function to be concentrated in a specific region, preventing excessive gate line loading.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves a stable capacitance between the gate and source electrodes, preventing flickering and maintaining a high aperture ratio, with the extension portion's length optimized between 1 μm to 5 μm, effectively reducing the total load capacitance and increasing the aperture ratio compared to conventional methods.
Implementation Method 1
A capacitance Cgs may be generated between a gate electrode and a source electrode of a thin film transistor (TFT), and a potential at a pixel may be pulled down due to a potential at the gate electrode.
Data Source
AI summary
An array substrate includes a gate electrode and a source electrode arranged on a base substrate of the array substrate. The source electrode has a first end connected to a pixel electrode on the array substrate, and a second end opposite to the first end. A tip of the second end is provided with an extension portion, and an orthogonal projection of the extension portion onto the base substrate extends beyond an orthogonal projection of the gate electrode onto the base substrate.