Thin Film Transistor Array Panel Sulfur-Free Passivation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The formation of foreign particles, such as copper sulfide, on the surface of signal lines in thin film transistor array panels during the process of forming contact holes in the passivation layer leads to contamination and deterioration of contact characteristics, particularly when using inorganic passivation layers or ashing processes with organic layers.
Innovation Solution
A thin film transistor array panel design incorporating an organic passivation layer without sulfur, combined with a manufacturing method that uses a fluorine-based etching gas and oxygen gas in a plasma etching process with specific pressure and power ratios to prevent the formation of copper sulfide particles, and an ashing process using oxygen plasma to remove excess organic material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an inorganic passivation layer is used, then the passivation effect is improved, but foreign particles are generated on the signal line surface during contact hole formation
Solution Approach 1:
The patent extracts and removes sulfur from the passivation layer material composition. By using an organic passivation layer without sulfur (such as organic insulators like benzocyclobutene or polyimide), the source of sulfur that reacts with copper to form foreign particles is eliminated, while maintaining the passivation function.
Solution Approach 2:
The patent changes the material composition parameter of the passivation layer from inorganic materials containing sulfur (such as silicon nitride) to organic materials without sulfur. This parameter change prevents the chemical reaction between sulfur and copper that generates foreign particles, while still achieving effective passivation.
2Ease of manufacture
If an ashing process is used to form contact holes in organic passivation layer, then the contact hole formation is achieved, but foreign particles are generated on the signal line surface
Solution Approach 1:
The patent changes the chemical composition parameter of the passivation layer to an organic material without sulfur. This prevents sulfur-containing foreign particles from being generated during the ashing process, while still allowing the ashing process to effectively form contact holes.
3Reliability
If copper is used for signal line, then the resistivity is reduced, but copper sulfide particles are generated during processing
Solution Approach 1:
The patent extracts and removes sulfur from the processing environment by using a sulfur-free organic passivation layer. This eliminates the source of sulfur that would react with copper to form copper sulfide particles, allowing copper to be used for its low resistivity without generating harmful copper sulfide.
Solution Approach 2:
The patent creates a sulfur-free environment around the copper signal line by using an organic passivation layer without sulfur. This inert environment prevents the chemical reaction between sulfur and copper, protecting the copper from forming copper sulfide particles while maintaining its low resistivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents the generation of foreign particles on the signal lines, maintaining the integrity of contact characteristics and reducing contact resistance, thereby enhancing the reliability of the thin film transistor array panels.
Implementation Method 1
forming a contact hole exposing a portion of the signal line in the passivation layer by using a patterned organic material layer as an etching mask, wherein the contact hole is formed by using a first etching gas including a fluorine-based gas and a second etching gas including oxygen gas
Implementation Method 2
an ashing process using oxygen plasma to remove excess organic material
Data Source
AI summary
A thin film transistor array panel includes: a substrate; a signal line disposed on the substrate and including copper (Cu); a passivation layer disposed on the signal line and having a contact hole exposing a portion of the signal line; and a conductive layer disposed on the passivation layer and connected to the portion of the signal line through the contact hole, wherein the passivation layer includes an organic passivation layer including an organic insulator that does not include sulfur, and a method of manufacturing the thin film transistor prevents formation of foreign particles on the signal line.


