Thin-Film Transistor Array Substrate with Variable Gate Insulation Thickness
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Solution Overview
Problem
Conventional thin-film transistor array substrates face a trade-off between achieving large storage capacitance and maintaining a high aperture ratio, as increasing capacitance typically reduces the aperture ratio due to the thickness and area requirements of the insulation layer.
Innovation Solution
A thin-film transistor array substrate design where the gate insulation layer has a portion with a thickness smaller than the remaining portion, allowing for reduced thickness and area of the insulation layer between electrode plates, achieved through a manufacturing method involving half tone masking and controlled etching operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the thickness of the insulation layer is reduced to increase storage capacitance, then the aperture ratio increases, but the manufacturing precision becomes more difficult to control
Solution Approach 1:
The gate insulation layer is divided into two distinct portions: a first portion with greater thickness and a second portion with lesser thickness. This segmentation allows each portion to serve different functional requirements - the thicker first portion provides adequate insulation and capacitance, while the thinner second portion increases the aperture ratio without compromising electrical isolation between conductive layers.
Solution Approach 2:
Different regions of the gate insulation layer are assigned different thicknesses according to local requirements. The first portion (with greater thickness) is positioned where electrical isolation and capacitance are critical, while the second portion (with lesser thickness) is positioned where maximizing aperture ratio is the priority. This local differentiation resolves the contradiction between insulation requirements and aperture optimization.
2Quantity of substance
If the area of electrode plates is increased to increase storage capacitance, then the capacitance increases, but the aperture ratio decreases
Solution Approach 1:
Instead of increasing capacitance by expanding the planar area of electrode plates (which would reduce aperture ratio), the invention transitions to a vertical dimension solution by varying the thickness of the gate insulation layer. The capacitance is enhanced through the thickness differential of the insulation layer rather than through area expansion, thereby maintaining a high aperture ratio while achieving the desired capacitance value.
3Quantity of substance
If a uniform thick insulation layer is used to ensure adequate capacitance, then the storage capacitance is sufficient, but the aperture ratio is reduced
Solution Approach 1:
The gate insulation layer is segmented into a first portion with greater thickness and a second portion with lesser thickness. The first portion ensures adequate capacitance and electrical isolation, while the second portion maximizes the aperture ratio. This segmentation eliminates the need for a uniformly thick insulation layer across the entire device structure.
Solution Approach 2:
The thickness parameter of the gate insulation layer is changed from a uniform value to a spatially variable value. By adjusting the thickness parameter differently in different regions (first portion vs. second portion), the invention simultaneously achieves sufficient capacitance and high aperture ratio, resolving the contradiction between these two parameters.
Data Source
AI summary
A thin-film transistor (TFT) array substrate includes a TFT arrangement and a storage capacitor. A gate insulation layer has a portion interposed between two electrode plates of the storage capacitor and thinner than a remaining portion of the gate insulation layer and thus, the thickness of insulation between the electrode plates of the storage capacitor is reduced so that the area of the opposite surfaces of the capacitor can be made smaller and an increased aperture ratio can be achieved.