Thin Film Transistor Array Substrate with Vertical Common Electrode

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional liquid crystal display (LCD) devices with in-plane switching (IPS) mode face challenges in increasing the aperture ratio of the pixel region due to the large width of the black matrix required to prevent light leakage, which decreases the aperture ratio and makes it difficult to enhance the viewing angle.

Innovation Solution

A thin film transistor array substrate is designed with a second common electrode overlapping the data line, positioned between the gate insulation film and the protective film, and having inclined surfaces connected to the substrate, along with an organic insulation film that reduces parasitic capacitance and signal delay, while also preventing light leakage and disconnection defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the width of the black matrix is increased to prevent light leakage, then light leakage is reduced, but the aperture ratio of the pixel region decreases

Engineering Contradiction:
Improvelight leakageVSAvoidaperture ratio of pixel region
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent transitions from a two-dimensional planar arrangement of common electrodes to a three-dimensional structure by positioning the second common electrode above the data line in the vertical dimension. This allows light blocking functionality to be achieved without increasing the horizontal width of black matrix structures, thereby preserving aperture ratio while preventing light leakage through the additional vertical layer.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The second common electrode is nested above the data line structure, creating a hierarchical arrangement where multiple functional layers are stacked vertically. This nesting approach allows the light-blocking function to be integrated within the existing pixel structure without requiring additional horizontal space that would reduce the aperture ratio.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Object-affected harmful factors

If first common electrodes are arranged at both sides of the data line to prevent light leakage, then light leakage is reduced, but the aperture ratio decreases and device complexity increases

Engineering Contradiction:
Improvelight leakageVSAvoidaperture ratio of pixel region
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

Instead of arranging common electrodes horizontally at both sides of the data line, the patent positions the second common electrode vertically above the data line. This dimensional change eliminates the need for multiple horizontal electrode arrangements while achieving the same light leakage prevention function, thereby preserving aperture ratio and reducing device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Object-affected harmful factors

If the width of the black matrix is increased to intercept light, then light leakage is prevented, but the aperture ratio and viewing angle improvement becomes difficult

Engineering Contradiction:
Improvelight leakageVSAvoidviewing angle
Core Design Contradiction:
Object-affected harmful factorsVSAdaptability or versatility

Solution Approach 1:

The patent uses vertical stacking of the second common electrode above the data line to achieve light leakage prevention without increasing horizontal black matrix width. This preserves the pixel region dimensions required for wide viewing angle performance in IPS mode LCD devices, allowing both light leakage control and viewing angle improvement to coexist.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8378355B2Thin film transistor array substrate and method for fabricating the same
Publication Date: 2013.02.19 LG DISPLAY CO LTD
  • US8378355B2 patent drawing
  • US8378355B2 patent drawing
  • US8378355B2 patent drawing

AI summary

A thin film transistor array substrate including a substrate, a gate line intersecting a data line to define a pixel region on the substrate, a switching element disposed at an intersection of the gate line and the data line, a plurality of pixel electrodes and a plurality of first common electrodes alternately arranged in the pixel region, a second common electrode overlapping the data line and interposed between a gate insulation film and a protective film, a first storage electrode on the substrate, a second storage electrode overlapping the first storage electrode, and an organic insulation film on the switching element, the second storage electrode, the data line, a gate pad, and a data pad, wherein the second common electrode covers the data line, the protective film, the organic insulation film, and the gate insulation film, and has inclined surfaces connected to the surface of the substrate.