Thin Film Transistor Bridged Grain Lines and Dual Gate Structure
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Solution Overview
Problem
The existing manufacturing processes for display apparatuses with thin film transistors are inefficient, requiring multiple steps and time, and do not achieve optimal performance due to issues like electrical current leakage and hot carrier phenomena.
Innovation Solution
The implementation of a thin film transistor structure with bridged grain lines and semiconductor lines, where the bridged grain lines are doped with a high concentration of dopants and semiconductor lines with a lower dopant concentration, forming an interface to reduce electrical current leakage and hot carrier effects, along with a dual gate transistor structure for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing manufacturing processes are used for thin film transistors, then the manufacturing process can be completed, but it requires multiple steps and time, reducing productivity
Solution Approach 1:
The patent combines the gate electrode and storage electrode formation into a single manufacturing step by forming them from the same conductive material layer. This merging of functions reduces the total number of process steps and improves manufacturing productivity while maintaining the dual functionality of both electrodes
Solution Approach 2:
The first gate electrode serves multiple functions: it acts as the gate electrode for the thin film transistor, serves as a doping mask during the doping process, and functions as the first storage electrode of the capacitor. This multi-functionality reduces the number of separate components and process steps required
2Reliability
If existing thin film transistor structures are used, then manufacturing can proceed, but electrical current leakage and hot carrier phenomena occur, reducing reliability
Solution Approach 1:
The patent implements different doping concentrations at different locations within the semiconductor layer. The bridged grain lines have a first doping concentration while the grain boundary regions have a second doping concentration, creating local quality variations that optimize electrical performance and reduce harmful effects like current leakage and hot carrier phenomena
Solution Approach 2:
The patent changes the doping concentration parameter within the semiconductor layer to optimize performance. By varying the doping concentration between bridged grain lines and grain boundaries, the electrical characteristics are improved, reducing electrical current leakage and hot carrier effects while enhancing overall reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces electrical current leakage and hot carrier phenomena, enhancing the overall performance of the thin film transistor while simplifying the manufacturing process by eliminating the need for additional steps, thus achieving higher efficiency and reliability.
Implementation Method 1
a plurality of bridged grain lines doped with a first dopant concentration, and a plurality of semiconductor lines doped with a second dopant concentration
Data Source
AI summary
A display apparatus includes: at thin film transistor on a substrate; and a capacitor on the substrate, the capacitor including a first storage electrode and a second storage electrode. The thin film transistor includes: a semiconductor layer on the substrate, including: a channel region in which are disposed: bridged grain lines defined by portions of the semiconductor layer having an amount of a dopant, and semiconductor lines defined by portions of the semiconductor having a dopant amount less than that of the bridged grain lines and forming an interface with the bridged grain lines, and source and drain regions disposed at opposing sides of the channel region; and a gate electrode overlapping the semiconductor layer with a gate insulation film therebetween, the gate electrode including: first gate electrodes corresponding to the semiconductor lines, respectively, and a second gate electrode covering the gate electrodes.