Top-Gate TFT Substrate Buffer Groove for Vth Stability
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Solution Overview
Problem
In thin film transistors with a top gate structure, the process of conducting an oxide semiconductor layer can lead to excessive penetration, resulting in a reduced channel length and a negative shift in threshold voltage (Vth), causing leakage currents and increased power consumption.
Innovation Solution
A thin film transistor substrate design featuring a buffer groove with an inclined surface on which the active layer is disposed, with the gate electrode overlapping this surface, and a gate insulating layer that overlaps the groove, preventing deep penetration of oxygen vacancies and maintaining the channel length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the oxide semiconductor layer is conducted using a gate electrode as a mask, then the channel region is formed, but the region to be conductive is excessively penetrated, resulting in reduced channel length and negative shift of threshold voltage
Solution Approach 1:
The buffer layer is segmented by forming a buffer groove that divides the buffer layer into regions, creating a physical barrier that prevents excessive penetration of the conductive region into the channel area, thereby maintaining precise channel length control and threshold voltage stability
Solution Approach 2:
The buffer groove acts as an intermediary structure between the conductive region and the channel region, providing a physical barrier that controls the penetration depth and prevents direct contact that would cause channel length reduction and threshold voltage shift
2Ease of manufacture
If the width of the oxide semiconductor layer is increased, then the conducting process is improved, but the degree of penetration increases, further shortening the channel length
Solution Approach 1:
The buffer groove creates local quality differences in the buffer layer, providing enhanced protection specifically in the region where penetration occurs, allowing the oxide semiconductor layer to have sufficient width for efficient conducting process while preventing excessive penetration into the channel region
3Volume of moving object
If the channel length is reduced due to excessive penetration, then the device size is reduced, but leakage current increases and power consumption increases
Solution Approach 1:
The buffer groove is formed in advance before the oxide semiconductor layer deposition, creating a preliminary protective structure that prevents excessive penetration and maintains proper channel length, thereby preventing future leakage current and power consumption issues while allowing compact device design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design prevents the negative shift of threshold voltage, reducing leakage currents and power consumption while maintaining the channel length, thereby enhancing the on-current characteristics of the thin film transistor substrate.
Implementation Method 1
preventing deep penetration of oxygen vacancies diffused through a conducting process into the channel of the active layer
Data Source
AI summary
A thin film transistor substrate and a display device including the same. The thin film transistor substrate includes a substrate, a buffer layer having a buffer groove disposed on the substrate, wherein the buffer groove includes an inclined surface, an active layer disposed on the buffer layer, and a gate electrode disposed on the active layer, wherein the active layer is disposed to be stepped on the buffer groove, and one end of the gate electrode overlaps the inclined surface of the buffer groove.