Thin-Film Transistor Buffer Circuit for Low-Power Display Line Driving
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Solution Overview
Problem
Current control line driving sections for display panels, particularly in organic EL panels, face challenges with high power consumption and increased circuit size due to the need for high driving capacity, which complicates the design and increases costs when driving a large number of pixels.
Innovation Solution
A buffer circuit is proposed that uses a series connection of thin film transistors to reduce the driving capacity required for the set and reset pulses, incorporating a unique configuration of thin film transistors to manage the potential states of control lines efficiently, thereby reducing power consumption and circuit size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a conventional control line driving section is used to drive a large number of pixels, then the driving capacity is sufficient, but the power consumption increases and the circuit size increases
Solution Approach 1:
The control line driving section is divided into multiple independent buffer circuits, each responsible for driving a specific control line. This segmentation allows each buffer to operate independently with optimized transistor sizing, reducing the total power consumption compared to a single large driving circuit while maintaining sufficient driving capacity for all pixels.
Solution Approach 2:
Each buffer circuit within the control line driving section is designed with locally optimized transistor characteristics tailored to its specific driving requirements. By adjusting transistor width, length, and threshold voltage locally in each buffer, the circuit achieves efficient power utilization without requiring excessive driving capacity across the entire system.
2Power
If a conventional control line driving section is used to drive a large number of pixels, then the driving capacity is sufficient, but the circuit size increases
Solution Approach 1:
The control line driving section is segmented into multiple compact buffer circuits distributed across the pixel array. Each buffer occupies minimal space while providing sufficient driving capacity for its assigned control line, reducing the total circuit area compared to a centralized large-scale driving section.
Solution Approach 2:
The buffer circuits are arranged in a distributed two-dimensional layout across the display panel rather than concentrating all driving circuitry in a single location. This spatial distribution reduces local circuit density and overall circuit size while maintaining adequate driving capacity through the distributed architecture.
3Ease of manufacture
If thin film transistors of a single channel are used instead of CMOS circuit, then the fabrication steps are reduced, but the circuit functionality must be maintained
Solution Approach 1:
Instead of using complementary N-channel and P-channel transistors as in conventional CMOS circuits, the invention inverts the approach by using only N-channel thin film transistors configured in specific circuit topologies (such as depletion-mode and enhancement-mode transistor combinations) to achieve the same buffer circuit functionality, thereby simplifying fabrication while maintaining performance.
Solution Approach 2:
The invention utilizes different operating parameters of thin film transistors, specifically varying the threshold voltage (creating depletion-mode and enhancement-mode transistors from the same material system), to achieve complementary circuit behavior without requiring physically different transistor types. This parameter-based differentiation maintains circuit functionality while simplifying the manufacturing process.
Data Source
AI summary
A semiconductor device includes a plurality of thin film transistors of a single channel formed on an insulating substrate, and a buffer circuit including an outputting stage; a first inputting stage; a second inputting stage; a seventh thin film transistor; and an eighth thin film transistor.