TFT Array Capacitor Opening Layout for Stable Display Capacitance
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Solution Overview
Problem
Existing organic light-emitting display apparatuses face challenges in securing uniform performance due to process errors affecting the capacitance of capacitors in thin film transistor array substrates, leading to variations in display characteristics.
Innovation Solution
A thin film transistor array substrate design featuring a capacitor with a top electrode having a single closed curve opening that divides the overlapping area with the bottom electrode into two separate regions, minimizing capacitance variation by isolating the impact of process deviations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional capacitor structure is used, then the manufacturing process is simple, but the capacitance varies due to process errors
Solution Approach 1:
The top electrode is divided into multiple segments by forming openings, creating a segmented structure that isolates the impact of process deviations on capacitance measurement, thereby improving capacitance uniformity despite manufacturing variations
2Manufacturing precision
If the top electrode completely overlaps the bottom electrode, then the capacitance is maximized, but the capacitance becomes sensitive to overlay deviations
Solution Approach 1:
The overlapping area is divided into multiple separate regions by openings in the top electrode, so that overlay deviations affect only individual segments rather than the entire capacitance, improving performance uniformity across manufacturing batches
3Area of stationary object
If the critical dimension of electrodes is reduced, then the device size is minimized, but the capacitance becomes more sensitive to critical dimension deviations
Solution Approach 1:
The electrode structure is segmented into multiple regions separated by openings, which reduces the sensitivity of total capacitance to critical dimension variations in any single region, enabling better capacitance control in miniaturized devices
Solution Approach 2:
Different regions of the electrode structure have different local characteristics created by the openings, allowing the overall capacitance to be more robust to local dimensional variations while maintaining small total area
Data Source
AI summary
A thin film transistor array substrate includes a substrate, at least one thin film transistor, a capacitor, an interlayer insulating layer, and a node connection line. The at least one thin film transistor is on the substrate. The capacitor is on the substrate and includes: a bottom electrode on the substrate; a top electrode overlapping the bottom electrode, the top electrode including an opening having a single closed curve shape; and a dielectric layer between the bottom electrode and the top electrode. The interlayer insulating layer covers the capacitor. The node connection line is on the interlayer insulating layer and electrically connects the capacitor to the least one thin film transistor. An overlapping area of the bottom electrode and the top electrode is divided by the opening into two separate areas.