Thin Film Transistor Catalyst Layer Crystallization
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Solution Overview
Problem
Existing methods for crystallizing amorphous silicon (a-Si) layers into polycrystalline silicon (poly-Si) layers for thin film transistors (TFTs) face challenges such as high temperature annealing, expensive equipment requirements, surface protrusions, and excessive metal catalyst contamination, which degrade device characteristics and increase leakage current.
Innovation Solution
A method involving the formation of a thin metal catalyst layer using atomic layer deposition (ALD) to crystallize the a-Si layer with a small amount of metal catalyst, such as carbon, nitrogen, or halogen, which is diffused through a capping layer to minimize contamination and optimize TFT characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large amount of metal catalyst is used to crystallize the a-Si layer, then the crystallization process is effective, but the leakage current of the semiconductor layer increases due to metal contamination
Solution Approach 1:
A capping layer is introduced as an intermediary between the metal catalyst layer and the a-Si layer. This capping layer allows metal catalyst atoms to diffuse through it to reach the a-Si layer for crystallization, while simultaneously preventing excessive metal catalyst from directly contaminating the a-Si layer and semiconductor layer, thus resolving the contradiction between crystallization effectiveness and contamination control
Solution Approach 2:
The thickness of the capping layer is optimized to control the diffusion of metal catalyst atoms. By adjusting this parameter, the process achieves effective crystallization while minimizing metal contamination in the semiconductor layer
2Stability of the object's composition
If the SPC method is used to crystallize the a-Si layer, then the substrate is not deformed, but the process takes too much time and requires high temperature annealing
Solution Approach 1:
The metal catalyst layer acts as a mediator that enables crystallization at lower temperatures. The metal catalyst atoms diffuse into the a-Si layer and serve as nucleation sites, allowing crystallization to proceed at temperatures below 700°C rather than requiring high-temperature annealing, thus reducing both time and substrate stress
Solution Approach 2:
The crystallization temperature parameter is changed from high temperature (SPC method) to lower temperature (MIC method) by introducing metal catalyst, achieving faster crystallization while maintaining substrate stability
3Productivity
If the ELC method is used to crystallize the a-Si layer, then the crystallization is fast, but expensive laser apparatuses are required and surface protrusions are formed
Solution Approach 1:
The expensive laser apparatus (optical system) is replaced with a thermal annealing system. The metal catalyst-mediated crystallization process uses conventional thermal treatment instead of excimer laser irradiation, eliminating the need for expensive laser equipment while avoiding surface protrusion formation
Solution Approach 2:
A thin metal catalyst layer is used as a consumable element that enables fast crystallization through thermal annealing at lower cost compared to laser equipment
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the amount of metal catalyst in the poly-Si layer, improving TFT characteristics and reducing leakage current, while allowing for crystallization at lower temperatures and shorter times, thus enhancing the performance and reliability of TFTs for use in OLED display devices.
Implementation Method 1
The substrate is annealed using thermal treatment or a laser so that the metal catalyst is diffused through the capping layer to the a-Si layer to form seeds
Implementation Method 2
the a-Si layer is crystallized into a poly-Si layer using the seeds
Implementation Method 3
In the MIC method, a metal, such as nickel (Ni), palladium (Pd), gold (Au), or aluminum (Al), is brought into contact with or doped into an a-Si layer to induce a phase change of the a-Si layer into a poly-Si layer
Implementation Method 4
The substrate is annealed using thermal treatment or a laser so that the metal catalyst is diffused through the capping layer to the a-Si layer
Data Source
AI summary
A thin film transistor (TFT), a method of fabricating the same, and display device having the TFT of which the TFT includes a metal catalyst layer disposed on a substrate, a semiconductor layer disposed on the metal catalyst layer, a gate insulating layer disposed on the entire surface of the substrate, a gate electrode disposed on the gate insulating layer at a position corresponding to the semiconductor layer, an interlayer insulating layer disposed on the entire surface of the substrate, and source and drain electrodes disposed on the interlayer insulating layer and connected to the semiconductor layer, wherein the metal catalyst layer includes one of carbon, nitrogen, and halogen. The thin film transistor includes a poly-Si layer that may be formed to a smaller thickness than in conventional deposition methods thereby producing a TFT in which the remaining amount of metal catalyst in a semiconductor layer is reduced.