Thin-Film Transistor Cell Layout for Heat Dissipation and Reliability
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Solution Overview
Problem
The high concentration arrangement of source and drain branches in thin film transistors leads to heat concentration, resulting in poor reliability of display devices, particularly in high PPI and high refresh frequency applications.
Innovation Solution
The design of thin film transistors with multiple source and drain electrode wirings, divided into cells, arranged in parallel and spaced apart, forming at least two cell lines, and incorporating a semiconductor layer with multiple branches, to enhance heat dissipation and reduce current accumulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If source and drain branches are arranged in high concentration form to increase charging current, then charging current is improved, but heat concentration occurs leading to poor reliability
Solution Approach 1:
The source and drain electrodes are divided into multiple branches (first source electrode branch, second source electrode branch, first drain electrode branch, second drain electrode branch) that are spatially separated and arranged in different regions of the semiconductor layer, reducing local current density and heat concentration while maintaining total charging current capability
Solution Approach 2:
The electrode branches are arranged in a two-dimensional distributed pattern across the semiconductor layer rather than concentrated in one location, with source and drain branches positioned at different spatial coordinates to disperse heat generation across multiple regions
2Power
If width to length ratio of TFT channel is increased to increase charging current, then charging current is improved, but device area increases
Solution Approach 1:
The channel is segmented into multiple regions with distributed source and drain branches, allowing the current conduction path to be extended through parallel branches rather than increasing the width of a single channel, thus maintaining compact area while achieving high charging current
Solution Approach 2:
Multiple source electrode branches and drain electrode branches are electrically connected in parallel through the semiconductor layer, combining their current conduction capabilities to achieve high charging current without requiring a single large-width channel
Data Source
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AI summary
The present disclosure provides a thin film transistor, a GOA circuit and an array substrate, the thin film transistor comprising: A source electrode, including a source electrode wiring and a plurality of source electrode branches; a drain electrode, including a drain electrode wiring and a plurality of drain electrode branches; a gate; a semiconductor layer comprising a plurality of semiconductor branches; a plurality of source electrode branches, wherein the plurality of drain electrode branches are in contact with the plurality of semiconductor branches and are divided into a plurality of cells; the source electrode wiring and the drain electrode wiring are arranged in a parallel and spaced apart, and the number m of one of the source electrode wiring and the drain electrode wiring is an integer greater than or equal to 2, and the number n of the other is an integer greater than or equal to 1; the plurality of cells are arranged into at least two cell lines, the source electrode branch in each cell line is connected to the same source electrode wiring, and the drain electrode branch in each cell line is connected to the same drain electrode wiring. The thin film transistor, GOA circuit, and array substrate provided by the present disclosure solve the problem of heat accumulation caused by a high film transistor source and drain branch arrangement.