TFT Channel Layer Protection via Integrated Etching Stopping Layer

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Solution Overview

Problem

Existing thin film transistor (TFT) manufacturing methods face challenges in protecting the channel layer during etching processes, leading to potential damage and increased manufacturing costs due to the need for additional protective layers.

Innovation Solution

The use of a transparent organic etching stopping layer (ESL) is integrated into the TFT manufacturing process, formed in the same photo etching process as the channel layer, to prevent damage and reduce costs by isolating the source and drain from the channel layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an etching stopping layer is utilized to protect the channel layer, then the channel layer is protected from damage during etching processes, but the device complexity and manufacturing cost increase due to additional protective layers

Engineering Contradiction:
Improvechannel layer protectionVSAvoidnumber of protective layers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the channel layer formation and etching stopping layer formation into a single photo etching process. The etching stopping layer is formed simultaneously with the channel layer in the same photo etching step, eliminating the need for separate protective layer deposition and reducing manufacturing complexity while maintaining channel layer protection

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The photo etching process serves multiple functions: it forms the channel layer pattern and simultaneously creates the etching stopping layer structure. This multi-functional approach reduces the total number of process steps and simplifies the manufacturing sequence while ensuring the channel layer is protected during subsequent etching operations

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If additional protective layers are added to protect the channel layer, then the channel layer is better protected during etching, but the manufacturing cost increases

Engineering Contradiction:
Improvechannel layer protectionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the formation of the channel layer and etching stopping layer into one photo etching process step. By using the same photo etching process to create both structures simultaneously, the patent eliminates the need for additional material deposition and processing steps, thereby reducing manufacturing cost while maintaining adequate channel layer protection

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The channel layer formation process itself generates the etching stopping layer structure as a byproduct. The photo etching process that creates the channel layer pattern automatically forms the etching stopping layer in the same operation, making the system self-sufficient and eliminating the need for separate protective layer manufacturing steps

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The etching stopping layer effectively protects the channel layer during etching, reducing manufacturing costs and improving the reliability of TFTs while maintaining conductivity and electron mobility.

Implementation Method 1

The use of a transparent organic etching stopping layer (ESL) is integrated into the TFT manufacturing process, formed in the same photo etching process as the channel layer, to prevent damage and reduce costs by isolating the source and drain from the channel layer

Methodology Applied
Scientific EffectEtching stopping:

Data Source

PatentUS9893198B2Thin film transistor utilized in array substrate and manufacturing method thereof
Publication Date: 2018.02.13 HON HAI PRECISION INDUSTRY CO LTD
  • US9893198B2 patent drawing
  • US9893198B2 patent drawing
  • US9893198B2 patent drawing

AI summary

A method for manufacturing a thin film transistor (TFT) which includes a gate, a gate insulation layer, a channel layer, an etching stopping layer, a source, and a drain. The gate is formed on a substrate. The gate insulation layer covers the gate and the substrate. The channel layer is formed on the gate insulation layer to correspond with the gate. The etching stopping layer is formed on a surface of the channel layer. The channel layer and the etching stopping layer are formed in a same photo etching process.