TFT Substrate Channel Length Measuring Pattern

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Solution Overview

Problem

In the manufacturing of thin film transistor (TFT) substrates for display panels, existing technologies face challenges in accurately positioning conductive patterns and maintaining precise intervals between them, which can lead to errors and misalignment during patterning processes, affecting the characteristics and performance of the TFTs.

Innovation Solution

A TFT substrate design that includes a base substrate with a gate electrode, semiconductor layer, source and drain electrodes, and a gate insulating layer, along with measuring patterns to accurately measure the channel region length, ensuring precise alignment and reducing manufacturing errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple patterning processes are performed to manufacture TFT substrate, then conductive patterns can be formed, but positioning accuracy and interval maintenance of conductive patterns deteriorate due to cumulative errors

Engineering Contradiction:
Improvepositioning accuracy of conductive patternsVSAvoidcomplexity of multiple patterning processes
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming a channel length measuring pattern before the main conductive patterns during the patterning process. This measuring pattern serves as a reference that is formed in advance, allowing subsequent conductive patterns to be aligned relative to it, thereby preventing cumulative positioning errors that would otherwise occur with multiple independent patterning steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using the channel length measuring pattern as a reference standard that provides positional information for controlling the formation of source and drain electrodes. The measuring pattern creates a feedback mechanism where the position and interval of subsequent conductive patterns are determined based on the established reference, ensuring consistent positioning accuracy throughout the manufacturing process.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If channel length is not accurately measured, then TFT characteristics cannot be controlled, but adding measurement structures increases device complexity

Engineering Contradiction:
Improvechannel length measurement accuracyVSAvoidcomplexity of measuring pattern structures
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the measurement function with the existing gate insulating layer structure. The channel length measuring pattern is formed on top of the gate insulating layer, combining the measurement reference function with the existing device structure rather than adding separate, complex measurement apparatus. This integration achieves precise channel length measurement while minimizing additional structural complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate insulating layer serves as an intermediary that supports the channel length measuring pattern. By using the gate insulating layer as a substrate for the measuring pattern, the patent creates a simple yet effective measurement reference structure that leverages existing layers, avoiding the need for complex dedicated measurement structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9613876B2Thin film transistor substrate including a channel length measuring pattern and display panel having the same
Publication Date: 2017.04.04 SAMSUNG DISPLAY CO LTD
  • US9613876B2 patent drawing
  • US9613876B2 patent drawing
  • US9613876B2 patent drawing

AI summary

A thin film transistor (TFT) substrate includes a base substrate, a TFT disposed on the base substrate. The TFT includes a gate electrode, a semiconductor layer comprising a channel region, and a source electrode and a drain electrode spaced apart from one another by a length of the channel region. The TFT substrate further includes a gate insulating layer disposed between the gate electrode and the semiconductor layer and a measuring pattern configured to measure a length of the channel region.