TFT Channel UV-Attenuating Layer for UV Curing Protection
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Solution Overview
Problem
Oxide semiconductor materials used in thin film transistors (TFTs) are prone to degradation due to ultraviolet (UV) light exposure during the UV curing process in semiconductor manufacturing, affecting the integrity of the intermetal dielectric (IMD) layer.
Innovation Solution
Incorporating a UV-attenuating layer made of materials like molybdenum oxide, molybdenum-doped zinc oxide, or silicon nitride between the channel layer and the IMD layer to act as a shielding layer, protecting the channel layer from UV-induced degradation during the UV curing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If UV-attenuating layer is added to protect channel layer from UV damage, then channel layer integrity is maintained, but device structure becomes more complex
Solution Approach 1:
The UV-attenuating layer is designed to perform multiple functions: it protects the channel layer from UV damage, serves as an interlayer between the channel and IMD layers, and can be integrated with existing device fabrication processes. By making this layer multi-functional, the patent reduces the need for additional separate protective structures, thereby minimizing the increase in device complexity while maintaining channel layer integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The UV-attenuating layer effectively shields the channel layer from UV damage, maintaining the structural and electrical integrity of the TFTs, thereby enhancing the reliability and performance of the semiconductor devices.
Implementation Method 1
a UV-attenuating layer disposed on the channel layer to protect the channel layer from characteristic degradation caused by UV light
Data Source
AI summary
A transistor device includes a first source/drain region and a second source/drain region spaced apart from each other; a channel layer electrically connected to the first and second source/drain regions; a gate insulator layer; a gate electrode isolated from the channel layer by the gate insulator layer; and a UV-attenuating layer disposed on the channel layer to protect the channel layer from characteristic degradation caused by UV light.