TFT Channel Width Length Ratio Adjustment for Display Voltage Uniformity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Large-screen, high-definition liquid-crystal display devices face issues with irregular luminance, flicker, and diminished display quality due to variations in pre-write voltage and feed-through voltage across pixels, primarily caused by differences in TFT element size and gate insulating film thickness, especially with increasing screen size and driving speed.
Innovation Solution
The solution involves adjusting the channel width to channel length ratio (W/L) of TFT elements based on their distance from signal input terminals, varying the size of TFT elements connected to common scan and picture signal lines to minimize voltage variations, and accounting for variations in gate insulating film thickness to ensure uniform bias conditions across the display panel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If TFT elements are made with uniform size across the display panel, then manufacturing is simplified, but pre-write voltage and feed-through voltage vary across pixels due to line delay differences
Solution Approach 1:
The patent applies local quality by varying the W/L ratio of TFT elements based on their position on the display panel. Specifically, TFT elements closer to signal input terminals have smaller W/L ratios, while those farther away have larger W/L ratios. This localized adjustment compensates for line delay differences and gate insulating film thickness variations, ensuring uniform pre-write voltage and feed-through voltage across all pixels without requiring complex manufacturing processes.
2Productivity
If screen size and driving speed are increased for high-definition displays, then display quality and resolution improve, but voltage variations across pixels increase due to longer line delays
Solution Approach 1:
The patent employs parameter changes by systematically varying the W/L ratio parameter of TFT elements according to their position on the display panel. For high-definition displays with longer scan signal lines, this parameter adjustment compensates for increased line delays and gate insulating film thickness variations. The W/L ratio is increased for TFT elements farther from signal input terminals, maintaining uniform voltage characteristics across all pixels even in large-screen, high-speed displays.
3Manufacturing precision
If the W/L ratio of TFT elements is varied to compensate for line delay, then voltage uniformity improves, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the display panel into multiple regions based on distance from signal input terminals. Within each region, TFT elements have uniform W/L ratios, creating a stepped compensation pattern. This segmented approach simplifies manufacturing compared to continuous variation, while still effectively compensating for line delay differences and gate insulating film thickness variations across the entire display panel.
Data Source
AI summary
A display device comprising a plurality of scan signal lines; a plurality of picture signal lines three-dimensionally intersecting the plurality of scan signal lines; and numerous TFT elements arranged in a matrix; and having a display panel in which each of the TFT elements has a gate connected to one of the plurality of scan signal lines, and a drain or source connected to one of the plurality of picture signal lines; wherein the TFT elements respectively differ in terms of channel width, channel length, or both, depending on a distance from a signal input terminal of the scan signal line to which the gate is connected and a distance from a signal input terminal of the picture signal line to which one of the drain and the source is connected.