TFT Substrate Chevron Pixel Electrodes for LCD Aperture Ratio
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Solution Overview
Problem
Small- and medium-sized LCDs with pixels arranged in the abscissa direction face reduced aperture ratio and transmittance, limiting their display capability compared to larger screens.
Innovation Solution
The design includes pixel electrodes formed in a chevron shape overlapping adjacent gate lines, with data lines having protrusions and a storage electrode line formed parallel to data lines to prevent kickback voltage increase and maintain constant parasitic capacitance, while the common electrode has cutout portions corresponding to the pixel electrode shape, enhancing aperture ratio and transmittance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of data lines is increased to increase LCD resolution, then the resolution is improved, but the number of data driving ICs increases and the size of the LCD increases
Solution Approach 1:
The patent merges multiple data driving functions into a single data driving IC by implementing a shared data line structure where one data line serves multiple pixel rows. This reduces the total number of data driving ICs required while maintaining high resolution through the pixel arrangement in the abscissa direction and gate IC integration method
2Device complexity
If pixels are arranged in the abscissa direction to efficiently arrange increased gate lines, then the gate line arrangement is improved, but the aperture ratio and transmittance are remarkably reduced in small- or medium-sized LCDs
Solution Approach 1:
The patent changes the pixel arrangement from the conventional ordinate direction to the abscissa direction, utilizing the horizontal dimension more effectively. This dimensional change allows for efficient gate line arrangement while the specific pixel electrode shape and overlapping structure compensate for the aperture ratio reduction in smaller screens
3Area of stationary object
If pixel electrodes are formed in a chevron shape overlapping adjacent gate lines, then the aperture ratio is improved, but the parasitic capacitance between data line and pixel electrode may increase
Solution Approach 1:
The patent optimizes the geometric parameters of the pixel electrode, including the angle of inclination of the chevron shape and the extent of overlapping with gate lines. By carefully controlling these parameters, the aperture ratio is maximized while the parasitic capacitance is kept within acceptable limits
Data Source
AI summary
A thin film transistor (“TFT”) substrate includes: gate lines extending along a first direction; data lines extending along a second direction intersecting the first direction; and a pixel electrode formed to extend at an angle from a first gate line toward a second gate line adjacent to the first gate line. A portion of the pixel electrode at least partially overlaps a portion of the second gate line. Each data line includes a source electrode and a drain electrode spaced apart from the source electrode.