TFT Substrate Copper-Titanium Electrodes Plasma Damage

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Solution Overview

Problem

In thin film transistor substrates using oxide semiconductor layers, the channel regions are damaged by plasma during passivation film formation, leading to deteriorated TFT characteristics, and the adhesiveness between copper alloy electrodes and passivation films is compromised, causing electrodes to be easily removed.

Innovation Solution

A method involving the formation of a multilayer film structure with a titanium oxide layer on copper electrodes, followed by annealing, which improves adhesiveness and reduces electrode removal from the passivation film, using a semiconductor layer made of indium gallium zinc oxide with a copper-titanium alloy film that rapidly forms titanium oxide during annealing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a copper alloy electrode is used to reduce resistance, then electrical conductivity is improved, but adhesiveness to passivation film deteriorates causing electrode removal

Engineering Contradiction:
Improveelectrical conductivityVSAvoidadhesiveness
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent employs a composite electrode structure consisting of a copper base layer providing electrical conductivity and a titanium oxide surface layer providing adhesiveness. This composite structure combines the advantageous properties of two different materials to simultaneously achieve low resistance and strong bonding to the passivation film.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The titanium oxide layer acts as an intermediary between the copper electrode and the passivation film. This intermediate layer facilitates strong chemical bonding with the passivation film while the copper base layer maintains electrical conductivity, thus mediating between the conflicting requirements of adhesiveness and conductivity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Strength

If thermal treatment is performed to form titanium oxide on copper alloy surface, then adhesiveness is improved, but treatment time becomes excessively long (120 minutes or longer)

Engineering Contradiction:
ImproveadhesivenessVSAvoidthermal treatment time
Core Design Contradiction:
StrengthVSLoss of time

Solution Approach 1:

The patent modifies the thermal treatment parameters by conducting annealing at elevated temperatures (350-450°C) for reduced durations (30-120 minutes). By optimizing the temperature-time parameter combination, the treatment achieves sufficient titanium oxide formation and adhesiveness improvement within a practical time frame.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The copper-titanium alloy composition is designed in advance with controlled titanium content (0.1-10 at%) to facilitate rapid oxide formation during subsequent thermal treatment. This preliminary material preparation enables faster adhesion enhancement compared to conventional copper alloys.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If passivation film is formed by plasma CVD to protect TFT, then reliability is improved, but channel region of oxide semiconductor layer is damaged deteriorating TFT characteristics

Engineering Contradiction:
Improveprotection of TFTVSAvoidplasma damage to channel region
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The titanium oxide layer on the electrode surface acts as a protective intermediary during plasma CVD processing. This layer shields the underlying copper and the oxide semiconductor channel region from direct plasma exposure and damage, while still allowing the passivation film to be formed effectively.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The copper-titanium alloy composition is designed beforehand to form a protective oxide layer during subsequent plasma processing. This pre-prepared material composition provides cushioning protection against plasma damage before the actual plasma CVD process begins.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the adhesiveness between electrodes and passivation films, reducing electrode removal and maintaining low resistance, thereby improving TFT characteristics and substrate reliability.

Implementation Method 1

an unexpected long time (e.g., 120 minutes or longer) is needed to diffuse titanium in the copper alloy to the film surface in the above-described thermal treatment

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

Titanium is then diffused to the surface of the film and reacts with oxygen of air to form a titanium oxide (TiOx) film on the surface of the copper alloy

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 3

the oxide semiconductor layers are subjected to, for example, thermal treatment (i.e., annealing) at a temperature of 350° C. or higher for one hour or longer

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS9209282B2Method of manufacturing thin film transistor substrate and thin film transistor substrate manufactured by the method
Publication Date: 2015.12.08 SHARP KK
  • US9209282B2 patent drawing
  • US9209282B2 patent drawing
  • US9209282B2 patent drawing

AI summary

The present invention includes at least a step forming a source electrode (32) and a drain electrode (33), each of which is a multilayer film of a first conductive film (32a), (33a) made of titanium or molybdenum, a second conductive film (32b), (33b) made of copper, and a third conductive film (32c), (33c) made of titanium oxide, a step of forming passivation film (18), which is an inorganic insulating film, on an oxide semiconductor layer (13), the source electrode (32) and drain electrode (33), and an annealing step of annealing the oxide semiconductor layer (13).