Thin Film Transistor Current Reduction Layer for OLED Aperture Ratio
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Solution Overview
Problem
Current OLED and display panel technologies face challenges in reducing operating current without compromising the aperture ratio, often requiring increased semiconductor channel length which expands the device area.
Innovation Solution
A thin film transistor (TFT) design incorporating a current reduction layer between the semiconductor layer and the source and drain, made of high dielectric constant materials like silicon oxide or aluminum oxide, to reduce current flow without increasing the device area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the channel length of the semiconductor layer is increased to reduce operating current, then the current is reduced, but the device area increases and aperture ratio deteriorates
Solution Approach 1:
A current reduction layer is introduced as an intermediary component between the source and the semiconductor layer. This layer has higher resistance than the source and semiconductor layer, effectively reducing the operating current without requiring an increase in channel length. The current reduction layer acts as a mediator that controls current flow while maintaining the original device footprint.
Solution Approach 2:
The current reduction layer is positioned specifically at the source contact region where it is needed to reduce current, rather than uniformly increasing the channel length across the entire device. This localized modification allows current reduction while preserving the aperture ratio and overall device area.
2Use of energy by moving object
If the channel length of the semiconductor layer is increased to reduce operating current, then the current is reduced, but the aperture ratio deteriorates
Solution Approach 1:
The current reduction layer serves as a mediator that reduces operating current through its higher resistance properties, eliminating the need to increase channel length. This preserves the aperture ratio since the light-emitting area is not compromised by extended channel dimensions.
Solution Approach 2:
The device is segmented into distinct functional layers, with the current reduction layer separated from the semiconductor layer by an insulating layer. This segmentation allows the current reduction function to be performed independently without affecting the aperture ratio determined by the semiconductor layer geometry.
3Loss of energy
If the operating voltage or current is reduced due to material improvement, then power consumption is reduced, but the aperture ratio deteriorates
Solution Approach 1:
The current reduction layer acts as an intermediary that enables low power consumption operation by controlling current flow, independent of material improvements. This allows the device to operate at lower power without compromising the aperture ratio, as the current control is achieved through the added layer rather than by reducing the active area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables operation under low current conditions while maintaining a small device area, thereby enhancing the aperture ratio of OLED and display panels.
Implementation Method 1
A thin film transistor (TFT) design incorporating a current reduction layer between the semiconductor layer and the source and drain, made of high dielectric constant materials like silicon oxide or aluminum oxide, to reduce current flow without increasing the device area.
Data Source
AI summary
A thin film transistor (TFT) includes a gate, a semiconductor layer, an insulating layer, a source, a drain, and a current reduction layer. The insulating layer is disposed between the gate and the semiconductor layer. The source is connected to the semiconductor layer. The drain is connected to the semiconductor layer, and the source and the drain are separated from each other. The current reduction layer has a first part and a second part. The first part is disposed between the semiconductor layer and at least a part of the source, and the second part is disposed between the semiconductor layer and at least a part of the drain.