Thin Film Transistor Display Panel with Copper Data Lines
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Solution Overview
Problem
Large screen display panels with high resolutions face increased interconnection resistive-capacitive (RC) delays due to thicker interconnections, leading to signal propagation issues and decreased picture quality, while the use of copper for interconnections can cause diffusion and deterioration of pixel elements.
Innovation Solution
A thin film transistor display panel design where gate and data lines are thicker than source and drain electrodes, using copper for data lines and titanium or molybdenum for electrodes, with link members and insulating layers to reduce RC delays and prevent material diffusion, allowing for smaller contact holes and higher pixel opening rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If interconnections are made thicker to reduce RC delays, then signal propagation improves, but copper diffusion causes deterioration of pixel elements
Solution Approach 1:
The patent introduces a barrier layer as an intermediary between the copper interconnection and the pixel elements. This barrier layer prevents copper diffusion into the pixel elements while allowing the copper interconnection to maintain its thick structure for reduced RC delays and improved signal propagation.
Solution Approach 2:
The patent employs a composite structure consisting of copper interconnection material combined with a barrier layer material. This composite approach allows the system to benefit from copper's high conductivity for fast signal propagation while the barrier layer component prevents harmful copper diffusion into adjacent pixel elements.
2Area of moving object
If contact holes are made smaller to increase pixel opening rate, then display resolution improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent changes the material parameters of the contact hole structure by using specific materials with appropriate etching characteristics and adhesion properties. This allows the contact holes to be made smaller with maintained manufacturing precision through optimized material selection and deposition parameters.
Data Source
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Figure 3A
AI summary
A thin film transistor display panel includes: a gate electrode (124), a source electrode (173h, 173c) and a drain electrode (175h, 175l, 175c) which are included in a thin film transistor on a substrate (110); a data line 171) connected to the source electrode; a pixel link member (171s, 171s1, 171s2)connecting the drain electrode to a pixel electrode; and a gate pad (122, 191p) connected to the gate electrode through a gate line (121) and including a first gate subpad (122), a second gate subpad (191p) and a gate pad link member (171s3), in which the pixel link member and the gate pad link member are substantially same in thickness.