Thin Film Transistor Display Panel With Hill Portion
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Solution Overview
Problem
The challenge in producing high-performance thin film transistor display panels lies in achieving reliable charge mobility and maintaining ON-current characteristics, particularly with semiconductive oxide materials, where short channel lengths lead to charge mobility deterioration due to fringing fields and damage during etching processes, making it difficult to mass-produce large-area displays with consistent quality.
Innovation Solution
A thin film transistor display panel design featuring a semiconductive oxide layer with a hill portion and an etching prevention layer, where the source electrode is positioned to reduce vertical field generation and charge trapping, and a passivation layer is used to cover exposed semiconductor areas, enhancing reliability and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a short channel length is used in semiconductive oxide TFTs, then device area is reduced and integration density is improved, but charge mobility deteriorates due to fringing field effects
Solution Approach 1:
The patent applies local quality by creating a hill portion (protruding structure) at the back surface of the channel in the semiconductive oxide layer. This localized structural modification changes the electric field distribution specifically in the critical region near the source/drain electrodes, reducing fringing field effects on charge carriers while maintaining the overall short channel length for high integration density.
2Ease of manufacture
If conventional etching processes are used for source/drain electrodes, then manufacturing process is simplified, but the back surface of the channel portion becomes damaged
Solution Approach 1:
The patent implements beforehand cushioning by forming a protective layer (such as a silicon nitride or silicon oxide layer) over the back surface of the channel portion before the etching process. This protective layer acts as a cushion that prevents the etching plasma from directly damaging the semiconductive oxide channel, while being removable or permeable enough to allow subsequent processing steps to proceed effectively.
3Power
If vertical field generation is strong in the channel region, then current drive capability is improved, but charge trapping increases and reliability deteriorates
Solution Approach 1:
The hill portion structure creates local quality variations in the electric field distribution. By protruding from the back surface of the channel, it modifies the field strength locally - reducing the vertical field component that causes charge trapping at the interface, while maintaining adequate field strength for current drive through the main channel region.
Data Source
AI summary
A thin film transistor display panel a includes a transparent substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; a semiconductor layer positioned on the gate insulating layer and including a channel region; a source electrode and a drain electrode positioned on the semiconductor layer and facing each other; and a passivation layer configured to cover the source electrode, the drain electrode, and the semiconductor layer, wherein the semiconductor layer includes a relatively thick first portion between the source electrode and the gate electrode and a relatively thinner second portion between the drain electrode and the gate electrode overlap, the relatively thick first portion being sufficiently thick to substantially reduce a charge trapping phenomenon that may otherwise occur at a gate electrode to gate dielectric interface if the first portion were as thin as the second portion.


